1 -------------------------------------------------------------------------------
\r
2 -- Title : board_driver architecture
\r
3 -- Project : LU Digital Design
\r
4 -------------------------------------------------------------------------------
\r
5 -- File : board_driver.vhd
\r
6 -- Author : Thomas Handl
\r
8 -- Created : 2004-12-15
\r
9 -- Last update: 2006-02-24
\r
10 -------------------------------------------------------------------------------
\r
11 -- Description: display number on 7-segment display
\r
12 -------------------------------------------------------------------------------
\r
13 -- Copyright (c) 2004 TU Wien
\r
14 -------------------------------------------------------------------------------
\r
16 -- Date Version Author Description
\r
17 -- 2004-12-15 1.0 handl Created
\r
18 -- 2006-02-24 2.0 ST revised
\r
19 -------------------------------------------------------------------------------
\r
21 -------------------------------------------------------------------------------
\r
23 -------------------------------------------------------------------------------
\r
26 use IEEE.std_logic_1164.all;
\r
27 use IEEE.std_logic_unsigned.all;
\r
28 use IEEE.std_logic_arith.all;
\r
30 use work.vga_pak.all;
\r
32 -------------------------------------------------------------------------------
\r
34 -------------------------------------------------------------------------------
\r
37 architecture behav of board_driver is
\r
39 attribute syn_preserve : boolean;
\r
40 attribute syn_preserve of behav : architecture is true;
\r
43 signal display_value : std_logic_vector(2*BCD_WIDTH-1 downto 0);
\r
44 signal ten_value : std_logic_vector(BCD_WIDTH-1 downto 0);
\r
45 signal one_value : std_logic_vector(BCD_WIDTH-1 downto 0);
\r
46 signal digit_left : std_logic_vector(SEG_WIDTH-1 downto 0);
\r
47 signal digit_right : std_logic_vector(SEG_WIDTH-1 downto 0);
\r
51 -----------------------------------------------------------------------------
\r
52 -- generate control data
\r
53 -----------------------------------------------------------------------------
\r
56 display_value <= "00000001"; -- vector of two BCD coded numbers to be displayed
\r
57 one_value <= display_value(BCD_WIDTH-1 downto 0); -- BCD number to be displayed in right digit
\r
58 ten_value <= display_value(2*BCD_WIDTH-1 downto BCD_WIDTH); -- BCD number to be displayed in left digit
\r
61 SEG_DATA: process(reset, one_value, ten_value)
\r
63 if (reset = RES_ACT) then -- upon reset
\r
64 digit_left <= DIGIT_OFF; -- ... switch off display
\r
65 digit_right <= DIGIT_OFF;
\r
66 else -- during operation
\r
67 case one_value is -- ...display "one" position according
\r
68 when "0000" => digit_right <= DIGIT_ZERO; -- ...to translation table
\r
69 when "0001" => digit_right <= DIGIT_ONE;
\r
70 when "0010" => digit_right <= DIGIT_TWO;
\r
71 when "0011" => digit_right <= DIGIT_THREE;
\r
72 when "0100" => digit_right <= DIGIT_FOUR;
\r
73 when "0101" => digit_right <= DIGIT_FIVE;
\r
74 when "0110" => digit_right <= DIGIT_SIX;
\r
75 when "0111" => digit_right <= DIGIT_SEVEN;
\r
76 when "1000" => digit_right <= DIGIT_EIGHT;
\r
77 when "1001" => digit_right <= DIGIT_NINE;
\r
78 when others => digit_right <= DIGIT_F; -- use "F" as overflow
\r
81 case ten_value is -- same for "ten" position
\r
82 when "0000" => digit_left <= DIGIT_ZERO;
\r
83 when "0001" => digit_left <= DIGIT_ONE;
\r
84 when "0010" => digit_left <= DIGIT_TWO;
\r
85 when "0011" => digit_left <= DIGIT_THREE;
\r
86 when "0100" => digit_left <= DIGIT_FOUR;
\r
87 when "0101" => digit_left <= DIGIT_FIVE;
\r
88 when "0110" => digit_left <= DIGIT_SIX;
\r
89 when "0111" => digit_left <= DIGIT_SEVEN;
\r
90 when "1000" => digit_left <= DIGIT_EIGHT;
\r
91 when "1001" => digit_left <= DIGIT_NINE;
\r
92 when others => digit_left <= DIGIT_F;
\r
98 -- combine the two digits to one bus
\r
99 seven_seg(SEG_WIDTH-1 downto 0) <= digit_right;
\r
100 seven_seg(2*SEG_WIDTH-1 downto SEG_WIDTH) <= digit_left;
\r