alpha/ngen.c

   1 /* alpha/ngen.c ****************************************************************
   2
   3         Copyright (c) 1997 A. Krall, R. Grafl, M. Gschwind, M. Probst
   4
   5         See file COPYRIGHT for information on usage and disclaimer of warranties
   6
   7         Contains the codegenerator for an Alpha processor.
   8         This module generates Alpha machine code for a sequence of
   9         pseudo commands (ICMDs).
  10
  11         Authors: Andreas  Krall      EMAIL: cacao@complang.tuwien.ac.at
  12                  Reinhard Grafl      EMAIL: cacao@complang.tuwien.ac.at
  13
  14         Last Change: 1998/08/10
  15
  16 *******************************************************************************/
  17
  18
  19
  20 /* *****************************************************************************
  21
  22 Datatypes and Register Allocations:
  23 -----------------------------------
  24
  25 On 64-bit-machines (like the Alpha) all operands are stored in the
  26 registers in a 64-bit form, even when the correspondig JavaVM  operands
  27 only need 32 bits. This is done by a canonical representation:
  28
  29 32-bit integers are allways stored as sign-extended 64-bit values (this
  30 approach is directly supported by the Alpha architecture and is very easy
  31 to implement).
  32
  33 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  34 expanding the exponent and mantissa with zeroes. (also supported by the
  35 architecture)
  36
  37
  38 Stackframes:
  39
  40 The calling conventions and the layout of the stack is  explained in detail
  41 in the documention file: calling.doc
  42
  43 *******************************************************************************/
  44
  45
  46 /* additional functions and macros to generate code ***************************/
  47
  48 #define BlockPtrOfPC(pc)        block+block_index[pc]
  49
  50 #ifdef STATISTICS
  51 #define COUNT_SPILLS count_spills++
  52 #else
  53 #define COUNT_SPILLS
  54 #endif
  55
  56
  57 /* gen_nullptr_check(objreg) */
  58
  59 #ifdef SOFTNULLPTRCHECK
  60 #define gen_nullptr_check(objreg) \
  61         if (checknull) {\
  62         M_BEQZ((objreg), REG);\
  63         mcode_addxnullrefs(mcodeptr);\
  64         }
  65 #else
  66 #define gen_nullptr_check(objreg)
  67 #endif
  68
  69
  70 /* MCODECHECK(icnt) */
  71
  72 #define MCODECHECK(icnt) \
  73         if((mcodeptr+(icnt))>mcodeend)mcodeptr=mcode_increase((u1*)mcodeptr)
  74
  75 /* M_INTMOVE:
  76      generates an integer-move from register a to b.
  77      if a and b are the same int-register, no code will be generated.
  78 */
  79
  80 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
  81
  82
  83 /* M_FLTMOVE:
  84     generates a floating-point-move from register a to b.
  85     if a and b are the same float-register, no code will be generated
  86 */
  87
  88 #define M_FLTMOVE(a,b) if(a!=b){M_FMOV(a,b);}
  89
  90
  91 /* var_to_reg_xxx:
  92     this function generates code to fetch data from a pseudo-register
  93     into a real register.
  94     If the pseudo-register has actually been assigned to a real
  95     register, no code will be emitted, since following operations
  96     can use this register directly.
  97
  98     v: pseudoregister to be fetched from
  99     tempregnum: temporary register to be used if v is actually spilled to ram
 100
 101     return: the register number, where the operand can be found after
 102             fetching (this wil be either tempregnum or the register
 103             number allready given to v)
 104 */
 105
 106 #define var_to_reg_int(regnr,v,tempnr) { \
 107         if ((v)->flags & INMEMORY) \
 108                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 109         else regnr=(v)->regoff; \
 110 }
 111
 112
 113 #define var_to_reg_flt(regnr,v,tempnr) { \
 114         if ((v)->flags & INMEMORY) \
 115                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 116         else regnr=(v)->regoff; \
 117 }
 118
 119
 120 /* reg_of_var:
 121     This function determines a register, to which the result of an operation
 122     should go, when it is ultimatively intended to store the result in
 123     pseudoregister v.
 124     If v is assigned to an actual register, this register will be returned.
 125     Otherwise (when v is spilled) this function returns tempregnum.
 126     If not already done, regoff and flags are set in the stack location.
 127 */
 128
 129 static int reg_of_var(stackptr v, int tempregnum)
 130 {
 131         varinfo      *var;
 132
 133         switch (v->varkind) {
 134                 case TEMPVAR:
 135                         if (!(v->flags & INMEMORY))
 136                                 return(v->regoff);
 137                         break;
 138                 case STACKVAR:
 139                         var = &(interfaces[v->varnum][v->type]);
 140                         v->regoff = var->regoff;
 141                         if (!(var->flags & INMEMORY))
 142                                 return(var->regoff);
 143                         break;
 144                 case LOCALVAR:
 145                         var = &(locals[v->varnum][v->type]);
 146                         v->regoff = var->regoff;
 147                         if (!(var->flags & INMEMORY))
 148                                 return(var->regoff);
 149                         break;
 150                 case ARGVAR:
 151                         v->regoff = v->varnum;
 152                         if (IS_FLT_DBL_TYPE(v->type)) {
 153                                 if (v->varnum < fltreg_argnum) {
 154                                         v->regoff = argfltregs[v->varnum];
 155                                         return(argfltregs[v->varnum]);
 156                                         }
 157                                 }
 158                         else
 159                                 if (v->varnum < intreg_argnum) {
 160                                         v->regoff = argintregs[v->varnum];
 161                                         return(argintregs[v->varnum]);
 162                                         }
 163                         v->regoff -= intreg_argnum;
 164                         break;
 165                 }
 166         v->flags |= INMEMORY;
 167         return tempregnum;
 168 }
 169
 170
 171 /* store_reg_to_var_xxx:
 172     This function generates the code to store the result of an operation
 173     back into a spilled pseudo-variable.
 174     If the pseudo-variable has not been spilled in the first place, this
 175     function will generate nothing.
 176
 177     v ............ Pseudovariable
 178     tempregnum ... Number of the temporary registers as returned by
 179                    reg_of_var.
 180 */
 181
 182 #define store_reg_to_var_int(sptr, tempregnum) {       \
 183         if ((sptr)->flags & INMEMORY) {                    \
 184                 COUNT_SPILLS;                                  \
 185                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 186                 }                                              \
 187         }
 188
 189 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 190         if ((sptr)->flags & INMEMORY) {                    \
 191                 COUNT_SPILLS;                                  \
 192                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 193                 }                                              \
 194         }
 195
 196
 197 /* NullPointerException handlers and exception handling initialisation        */
 198
 199 typedef struct sigctx_struct {
 200
 201         long          sc_onstack;           /* sigstack state to restore          */
 202         long          sc_mask;              /* signal mask to restore             */
 203         long          sc_pc;                /* pc at time of signal               */
 204         long          sc_ps;                /* psl to retore                      */
 205         long          sc_regs[32];          /* processor regs 0 to 31             */
 206         long          sc_ownedfp;           /* fp has been used                   */
 207         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 208         unsigned long sc_fpcr;              /* floating point control register    */
 209         unsigned long sc_fp_control;        /* software fpcr                      */
 210                                             /* rest is unused                     */
 211         unsigned long sc_reserved1, sc_reserved2;
 212         unsigned long sc_ssize;
 213         char          *sc_sbase;
 214         unsigned long sc_traparg_a0;
 215         unsigned long sc_traparg_a1;
 216         unsigned long sc_traparg_a2;
 217         unsigned long sc_fp_trap_pc;
 218         unsigned long sc_fp_trigger_sum;
 219         unsigned long sc_fp_trigger_inst;
 220         unsigned long sc_retcode[2];
 221 } sigctx_struct;
 222
 223
 224 /* asm_signal_exception passes exception pointer and the signal context
 225         structure (contains the saved registers) to the assembler handler which
 226         restores registers and walks through the Java exception tables.
 227 */
 228
 229 void asm_signal_exception(void *xptr, void *sigctx);
 230
 231
 232 /* NullPointerException signal handler for hardware null pointer check */
 233
 234 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 235 {
 236         sigset_t nsig;
 237         int      instr;
 238         long     faultaddr;
 239
 240         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 241
 242         instr = *((int*)(sigctx->sc_pc));
 243         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 244
 245         if (faultaddr == 0) {
 246                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 247                 sigemptyset(&nsig);
 248                 sigaddset(&nsig, sig);
 249                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 250                 asm_signal_exception(proto_java_lang_NullPointerException, sigctx);
 251                 }
 252         else {
 253                 faultaddr += (long) ((instr << 16) >> 16);
 254                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 255                 panic("Stack overflow");
 256                 }
 257 }
 258
 259
 260 #ifdef __osf__
 261
 262 void init_exceptions(void)
 263 {
 264
 265 #else /* Linux */
 266
 267 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 268         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 269         Digital Unix this is done automatically.
 270 */
 271
 272 #include <asm/fpu.h>
 273
 274 extern unsigned long ieee_get_fp_control();
 275 extern void ieee_set_fp_control(unsigned long fp_control);
 276
 277 void init_exceptions(void)
 278 {
 279 /* initialize floating point control */
 280
 281 ieee_set_fp_control(ieee_get_fp_control()
 282                     & ~IEEE_TRAP_ENABLE_INV
 283                     & ~IEEE_TRAP_ENABLE_DZE
 284 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 285                     & ~IEEE_TRAP_ENABLE_OVF);
 286 #endif
 287
 288         /* install signal handlers we need to convert to exceptions */
 289
 290         if (!checknull) {
 291
 292 #if defined(SIGSEGV)
 293                 signal(SIGSEGV, (void*) catch_NullPointerException);
 294 #endif
 295
 296 #if defined(SIGBUS)
 297                 signal(SIGBUS, (void*) catch_NullPointerException);
 298 #endif
 299                 }
 300 }
 301
 302
 303 /* function gen_mcode **********************************************************
 304
 305         generates machine code
 306
 307 *******************************************************************************/
 308
 309 #define         MethodPointer   -8
 310 #define         FrameSize       -12
 311 #define     IsSync          -16
 312 #define     IsLeaf          -20
 313 #define     IntSave         -24
 314 #define     FltSave         -28
 315 #define     ExTableSize     -32
 316 #define     ExTableStart    -32
 317
 318 #define     ExEntrySize     -32
 319 #define     ExStartPC       -8
 320 #define     ExEndPC         -16
 321 #define     ExHandlerPC     -24
 322 #define     ExCatchType     -32
 323
 324 static void gen_mcode()
 325 {
 326         int  len, s1, s2, s3, d, bbs;
 327         s4   a;
 328         s4          *mcodeptr;
 329         stackptr    src;
 330         varinfo     *var;
 331         basicblock  *bptr;
 332         instruction *iptr;
 333
 334         {
 335         int p, pa, t, l, r;
 336
 337         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 338
 339         /* space to save used callee saved registers */
 340
 341         savedregs_num += (savintregcnt - maxsavintreguse);
 342         savedregs_num += (savfltregcnt - maxsavfltreguse);
 343
 344         parentargs_base = maxmemuse + savedregs_num;
 345
 346 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 347
 348         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 349                 parentargs_base++;
 350
 351 #endif
 352
 353         /* create method header */
 354
 355         (void) dseg_addaddress(method);                         /* MethodPointer  */
 356         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 357
 358 #ifdef USE_THREADS
 359
 360         /* IsSync contains the offset relative to the stack pointer for the
 361            argument of monitor_exit used in the exception handler. Since the
 362            offset could be zero and give a wrong meaning of the flag it is
 363            offset by one.
 364         */
 365
 366         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 367                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 368         else
 369
 370 #endif
 371
 372         (void) dseg_adds4(0);                                   /* IsSync         */
 373
 374         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 375         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 376         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 377         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 378
 379         /* create exception table */
 380
 381         for (len = 0; len < exceptiontablelength; len++) {
 382                 dseg_addtarget(BlockPtrOfPC(extable[len].startpc));
 383                 dseg_addtarget(BlockPtrOfPC(extable[len].endpc));
 384                 dseg_addtarget(BlockPtrOfPC(extable[len].handlerpc));
 385                 (void) dseg_addaddress(extable[len].catchtype);
 386                 }
 387
 388         /* initialize mcode variables */
 389
 390         mcodeptr = (s4*) mcodebase;
 391         mcodeend = (s4*) (mcodebase + mcodesize);
 392         MCODECHECK(128 + mparamcount);
 393
 394         /* create stack frame (if necessary) */
 395
 396         if (parentargs_base)
 397                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 398
 399         /* save return address and used callee saved registers */
 400
 401         p = parentargs_base;
 402         if (!isleafmethod)
 403                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 404         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 405                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 406         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 407                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 408
 409         /* save monitorenter argument */
 410
 411 #ifdef USE_THREADS
 412         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 413                 if (method->flags & ACC_STATIC) {
 414                         p = dseg_addaddress (class);
 415                         M_ALD(REG_ITMP1, REG_PV, p);
 416                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 417                         }
 418                 else {
 419                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 420                         }
 421                 }
 422 #endif
 423
 424         /* copy argument registers to stack and call trace function with pointer
 425            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 426         */
 427
 428         if (runverbose && isleafmethod) {
 429                 M_LDA (REG_SP, REG_SP, -(8*8));
 430                 M_AST(REG_RA, REG_SP, 1*8);
 431                 M_LST(argintregs[0], REG_SP, 2*8);
 432                 M_LST(argintregs[1], REG_SP, 3*8);
 433                 M_LST(argintregs[2], REG_SP, 4*8);
 434                 M_LST(argintregs[3], REG_SP, 5*8);
 435                 M_LST(argintregs[4], REG_SP, 6*8);
 436                 M_LST(argintregs[5], REG_SP, 7*8);
 437                 p = dseg_addaddress (method);
 438                 M_ALD(REG_ITMP1, REG_PV, p);
 439                 M_AST(REG_ITMP1, REG_SP, REG);
 440                 p = dseg_addaddress ((void*) (builtin_trace_args));
 441                 M_ALD(REG_PV, REG_PV, p);
 442                 M_JSR(REG_RA, REG_PV);
 443                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 444                 M_ALD(REG_RA, REG_SP, 1*8);
 445                 M_LLD(argintregs[0], REG_SP, 2*8);
 446                 M_LLD(argintregs[1], REG_SP, 3*8);
 447                 M_LLD(argintregs[2], REG_SP, 4*8);
 448                 M_LLD(argintregs[3], REG_SP, 5*8);
 449                 M_LLD(argintregs[4], REG_SP, 6*8);
 450                 M_LLD(argintregs[5], REG_SP, 7*8);
 451                 M_LDA (REG_SP, REG_SP, 8*8);
 452                 }
 453
 454         /* take arguments out of register or stack frame */
 455
 456         for (p = 0, l = 0; p < mparamcount; p++) {
 457                 t = mparamtypes[p];
 458                 var = &(locals[l][t]);
 459                 l++;
 460                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 461                         l++;
 462                 if (var->type < 0)
 463                         continue;
 464                 r = var->regoff;
 465                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 466                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 467                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 468                                         {M_INTMOVE (argintregs[p], r);}
 469                                 else                                 /* reg arg -> spilled    */
 470                                         M_LST (argintregs[p], REG_SP, 8 * r);
 471                                 }
 472                         else {                                   /* stack arguments       */
 473                                 pa = p - INT_ARG_CNT;
 474                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 475                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 476                                 else {                               /* stack arg -> spilled  */
 477                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 478                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 479                                         }
 480                                 }
 481                         }
 482                 else {                                       /* floating args         */
 483                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 484                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 485                                         {M_FLTMOVE (argfltregs[p], r);}
 486                                 else                                             /* reg arg -> spilled    */
 487                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 488                                 }
 489                         else {                                   /* stack arguments       */
 490                                 pa = p - FLT_ARG_CNT;
 491                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 492                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 493                                 else {                               /* stack-arg -> spilled  */
 494                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 495                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 496                                         }
 497                                 }
 498                         }
 499                 }  /* end for */
 500
 501         /* call trace function */
 502
 503         if (runverbose && !isleafmethod) {
 504                 M_LDA (REG_SP, REG_SP, -8);
 505                 p = dseg_addaddress (method);
 506                 M_ALD(REG_ITMP1, REG_PV, p);
 507                 M_AST(REG_ITMP1, REG_SP, REG);
 508                 p = dseg_addaddress ((void*) (builtin_trace_args));
 509                 M_ALD(REG_PV, REG_PV, p);
 510                 M_JSR(REG_RA, REG_PV);
 511                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 512                 M_LDA(REG_SP, REG_SP, 8);
 513                 }
 514
 515         /* call monitorenter function */
 516
 517 #ifdef USE_THREADS
 518         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 519                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 520                 M_ALD(REG_PV, REG_PV, p);
 521                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 522                 M_JSR(REG_RA, REG_PV);
 523                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 524                 }
 525 #endif
 526         }
 527
 528         /* end of header generation */
 529
 530         /* walk through all basic blocks */
 531
 532         for (bbs = block_count, bptr = block; --bbs >= 0; bptr++) {
 533                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 534
 535                 if (bptr->flags >= BBREACHED) {
 536
 537                 /* branch resolving */
 538
 539                 {
 540                 branchref *brefs;
 541                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 542                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 543                                           brefs->branchpos, bptr->mpc);
 544                         }
 545                 }
 546
 547                 /* copy interface registers to their destination */
 548
 549                 src = bptr->instack;
 550                 len = bptr->indepth;
 551                 MCODECHECK(64+len);
 552                 while (src != NULL) {
 553                         len--;
 554                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 555                                 d = reg_of_var(src, REG_ITMP1);
 556                                 M_INTMOVE(REG_ITMP1, d);
 557                                 store_reg_to_var_int(src, d);
 558                                 }
 559                         else {
 560                                 d = reg_of_var(src, REG_IFTMP);
 561                                 if ((src->varkind != STACKVAR)) {
 562                                         s2 = src->type;
 563                                         if (IS_FLT_DBL_TYPE(s2)) {
 564                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 565                                                         s1 = interfaces[len][s2].regoff;
 566                                                         M_FLTMOVE(s1,d);
 567                                                         }
 568                                                 else {
 569                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 570                                                         }
 571                                                 store_reg_to_var_flt(src, d);
 572                                                 }
 573                                         else {
 574                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 575                                                         s1 = interfaces[len][s2].regoff;
 576                                                         M_INTMOVE(s1,d);
 577                                                         }
 578                                                 else {
 579                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 580                                                         }
 581                                                 store_reg_to_var_int(src, d);
 582                                                 }
 583                                         }
 584                                 }
 585                         src = src->prev;
 586                         }
 587
 588                 /* walk through all instructions */
 589
 590                 src = bptr->instack;
 591                 len = bptr->icount;
 592                 for (iptr = bptr->iinstr;
 593                     len > 0;
 594                     src = iptr->dst, len--, iptr++) {
 595
 596         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 597         switch (iptr->opc) {
 598
 599                 case ICMD_NOP:        /* ...  ==> ...                                 */
 600                         break;
 601
 602                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 603
 604                         var_to_reg_int(s1, src, REG_ITMP1);
 605                         M_BEQZ((s1), REG);
 606                         mcode_addxnullrefs(mcodeptr);
 607                         break;
 608
 609                 /* constant operations ************************************************/
 610
 611 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 612                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 613
 614 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 615                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 616
 617                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 618                                       /* op1 = 0, val.i = constant                    */
 619
 620                         d = reg_of_var(iptr->dst, REG_ITMP1);
 621                         ICONST(d, iptr->val.i);
 622                         store_reg_to_var_int(iptr->dst, d);
 623                         break;
 624
 625                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 626                                       /* op1 = 0, val.l = constant                    */
 627
 628                         d = reg_of_var(iptr->dst, REG_ITMP1);
 629                         LCONST(d, iptr->val.l);
 630                         store_reg_to_var_int(iptr->dst, d);
 631                         break;
 632
 633                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 634                                       /* op1 = 0, val.f = constant                    */
 635
 636                         d = reg_of_var (iptr->dst, REG_FTMP1);
 637                         a = dseg_addfloat (iptr->val.f);
 638                         M_FLD(d, REG_PV, a);
 639                         store_reg_to_var_flt (iptr->dst, d);
 640                         break;
 641
 642                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 643                                       /* op1 = 0, val.d = constant                    */
 644
 645                         d = reg_of_var (iptr->dst, REG_FTMP1);
 646                         a = dseg_adddouble (iptr->val.d);
 647                         M_DLD(d, REG_PV, a);
 648                         store_reg_to_var_flt (iptr->dst, d);
 649                         break;
 650
 651                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 652                                       /* op1 = 0, val.a = constant                    */
 653
 654                         d = reg_of_var(iptr->dst, REG_ITMP1);
 655                         if (iptr->val.a) {
 656                                 a = dseg_addaddress (iptr->val.a);
 657                                 M_ALD(d, REG_PV, a);
 658                                 }
 659                         else {
 660                                 M_INTMOVE(REG_ZERO, d);
 661                                 }
 662                         store_reg_to_var_int(iptr->dst, d);
 663                         break;
 664
 665
 666                 /* load/store operations **********************************************/
 667
 668                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 669                 case ICMD_LLOAD:      /* op1 = local variable                         */
 670                 case ICMD_ALOAD:
 671
 672                         d = reg_of_var(iptr->dst, REG_ITMP1);
 673                         if ((iptr->dst->varkind == LOCALVAR) &&
 674                             (iptr->dst->varnum == iptr->op1))
 675                                 break;
 676                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 677                         if (var->flags & INMEMORY)
 678                                 M_LLD(d, REG_SP, 8 * var->regoff);
 679                         else
 680                                 {M_INTMOVE(var->regoff,d);}
 681                         store_reg_to_var_int(iptr->dst, d);
 682                         break;
 683
 684                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 685                 case ICMD_DLOAD:      /* op1 = local variable                         */
 686
 687                         d = reg_of_var(iptr->dst, REG_FTMP1);
 688                         if ((iptr->dst->varkind == LOCALVAR) &&
 689                             (iptr->dst->varnum == iptr->op1))
 690                                 break;
 691                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 692                         if (var->flags & INMEMORY)
 693                                 M_DLD(d, REG_SP, 8 * var->regoff);
 694                         else
 695                                 {M_FLTMOVE(var->regoff,d);}
 696                         store_reg_to_var_flt(iptr->dst, d);
 697                         break;
 698
 699
 700                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 701                 case ICMD_LSTORE:     /* op1 = local variable                         */
 702                 case ICMD_ASTORE:
 703
 704                         if ((src->varkind == LOCALVAR) &&
 705                             (src->varnum == iptr->op1))
 706                                 break;
 707                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 708                         if (var->flags & INMEMORY) {
 709                                 var_to_reg_int(s1, src, REG_ITMP1);
 710                                 M_LST(s1, REG_SP, 8 * var->regoff);
 711                                 }
 712                         else {
 713                                 var_to_reg_int(s1, src, var->regoff);
 714                                 M_INTMOVE(s1, var->regoff);
 715                                 }
 716                         break;
 717
 718                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 719                 case ICMD_DSTORE:     /* op1 = local variable                         */
 720
 721                         if ((src->varkind == LOCALVAR) &&
 722                             (src->varnum == iptr->op1))
 723                                 break;
 724                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 725                         if (var->flags & INMEMORY) {
 726                                 var_to_reg_flt(s1, src, REG_FTMP1);
 727                                 M_DST(s1, REG_SP, 8 * var->regoff);
 728                                 }
 729                         else {
 730                                 var_to_reg_flt(s1, src, var->regoff);
 731                                 M_FLTMOVE(s1, var->regoff);
 732                                 }
 733                         break;
 734
 735
 736                 /* pop/dup/swap operations ********************************************/
 737
 738                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 739
 740                 case ICMD_POP:        /* ..., value  ==> ...                          */
 741                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 742                         break;
 743
 744 #define M_COPY(from,to) \
 745                         d = reg_of_var(to, REG_IFTMP); \
 746                         if ((from->regoff != to->regoff) || \
 747                             ((from->flags ^ to->flags) & INMEMORY)) { \
 748                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 749                                         var_to_reg_flt(s1, from, d); \
 750                                         M_FLTMOVE(s1,d); \
 751                                         store_reg_to_var_flt(to, d); \
 752                                         }\
 753                                 else { \
 754                                         var_to_reg_int(s1, from, d); \
 755                                         M_INTMOVE(s1,d); \
 756                                         store_reg_to_var_int(to, d); \
 757                                         }\
 758                                 }
 759
 760                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 761                         M_COPY(src, iptr->dst);
 762                         break;
 763
 764                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 765
 766                         M_COPY(src,       iptr->dst->prev->prev);
 767
 768                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 769
 770                         M_COPY(src,       iptr->dst);
 771                         M_COPY(src->prev, iptr->dst->prev);
 772                         break;
 773
 774                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 775
 776                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 777
 778                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 779
 780                         M_COPY(src,             iptr->dst);
 781                         M_COPY(src->prev,       iptr->dst->prev);
 782                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 783                         M_COPY(src, iptr->dst->prev->prev->prev);
 784                         break;
 785
 786                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 787
 788                         M_COPY(src,                   iptr->dst);
 789                         M_COPY(src->prev,             iptr->dst->prev);
 790                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 791                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 792                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 793                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 794                         break;
 795
 796                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 797
 798                         M_COPY(src, iptr->dst->prev);
 799                         M_COPY(src->prev, iptr->dst);
 800                         break;
 801
 802
 803                 /* integer operations *************************************************/
 804
 805                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 806
 807                         var_to_reg_int(s1, src, REG_ITMP1);
 808                         d = reg_of_var(iptr->dst, REG_ITMP3);
 809                         M_ISUB(REG_ZERO, s1, d, REG);
 810                         store_reg_to_var_int(iptr->dst, d);
 811                         break;
 812
 813                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 814
 815                         var_to_reg_int(s1, src, REG_ITMP1);
 816                         d = reg_of_var(iptr->dst, REG_ITMP3);
 817                         M_LSUB(REG_ZERO, s1, d, REG);
 818                         store_reg_to_var_int(iptr->dst, d);
 819                         break;
 820
 821                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 822
 823                         var_to_reg_int(s1, src, REG_ITMP1);
 824                         d = reg_of_var(iptr->dst, REG_ITMP3);
 825                         M_INTMOVE(s1, d);
 826                         store_reg_to_var_int(iptr->dst, d);
 827                         break;
 828
 829                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 830
 831                         var_to_reg_int(s1, src, REG_ITMP1);
 832                         d = reg_of_var(iptr->dst, REG_ITMP3);
 833                         M_IADD(s1, REG_ZERO, d , REG);
 834                         store_reg_to_var_int(iptr->dst, d);
 835                         break;
 836
 837                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 838
 839                         var_to_reg_int(s1, src, REG_ITMP1);
 840                         d = reg_of_var(iptr->dst, REG_ITMP3);
 841                         if (has_ext_instr_set) {
 842                                 M_BSEXT(s1, d);
 843                                 }
 844                         else {
 845                                 M_SLL(s1, 56, d, CONST);
 846                                 M_SRA( d, 56, d, CONST);
 847                                 }
 848                         store_reg_to_var_int(iptr->dst, d);
 849                         break;
 850
 851                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 852
 853                         var_to_reg_int(s1, src, REG_ITMP1);
 854                         d = reg_of_var(iptr->dst, REG_ITMP3);
 855             M_CZEXT(s1, d);
 856                         store_reg_to_var_int(iptr->dst, d);
 857                         break;
 858
 859                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 860
 861                         var_to_reg_int(s1, src, REG_ITMP1);
 862                         d = reg_of_var(iptr->dst, REG_ITMP3);
 863                         if (has_ext_instr_set) {
 864                                 M_SSEXT(s1, d);
 865                                 }
 866                         else {
 867                                 M_SLL(s1, 48, d, CONST);
 868                                 M_SRA( d, 48, d, CONST);
 869                                 }
 870                         store_reg_to_var_int(iptr->dst, d);
 871                         break;
 872
 873
 874                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 875
 876                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 877                         var_to_reg_int(s2, src, REG_ITMP2);
 878                         d = reg_of_var(iptr->dst, REG_ITMP3);
 879                         M_IADD(s1, s2, d,  0);
 880                         store_reg_to_var_int(iptr->dst, d);
 881                         break;
 882
 883                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 884                                       /* val.i = constant                             */
 885
 886                         var_to_reg_int(s1, src, REG_ITMP1);
 887                         d = reg_of_var(iptr->dst, REG_ITMP3);
 888                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 889                                 M_IADD(s1, iptr->val.i, d, CONST);
 890                                 }
 891                         else {
 892                                 ICONST(REG_ITMP2, iptr->val.i);
 893                                 M_IADD(s1, REG_ITMP2, d, REG);
 894                                 }
 895                         store_reg_to_var_int(iptr->dst, d);
 896                         break;
 897
 898                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 899
 900                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 901                         var_to_reg_int(s2, src, REG_ITMP2);
 902                         d = reg_of_var(iptr->dst, REG_ITMP3);
 903                         M_LADD(s1, s2, d,  0);
 904                         store_reg_to_var_int(iptr->dst, d);
 905                         break;
 906
 907                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 908                                       /* val.l = constant                             */
 909
 910                         var_to_reg_int(s1, src, REG_ITMP1);
 911                         d = reg_of_var(iptr->dst, REG_ITMP3);
 912                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 913                                 M_LADD(s1, iptr->val.l, d, CONST);
 914                                 }
 915                         else {
 916                                 LCONST(REG_ITMP2, iptr->val.l);
 917                                 M_LADD(s1, REG_ITMP2, d, REG);
 918                                 }
 919                         store_reg_to_var_int(iptr->dst, d);
 920                         break;
 921
 922                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 923
 924                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 925                         var_to_reg_int(s2, src, REG_ITMP2);
 926                         d = reg_of_var(iptr->dst, REG_ITMP3);
 927                         M_ISUB(s1, s2, d, REG);
 928                         store_reg_to_var_int(iptr->dst, d);
 929                         break;
 930
 931                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 932                                       /* val.i = constant                             */
 933
 934                         var_to_reg_int(s1, src, REG_ITMP1);
 935                         d = reg_of_var(iptr->dst, REG_ITMP3);
 936                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 937                                 M_ISUB(s1, iptr->val.i, d, CONST);
 938                                 }
 939                         else {
 940                                 ICONST(REG_ITMP2, iptr->val.i);
 941                                 M_ISUB(s1, REG_ITMP2, d, REG);
 942                                 }
 943                         store_reg_to_var_int(iptr->dst, d);
 944                         break;
 945
 946                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 947
 948                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 949                         var_to_reg_int(s2, src, REG_ITMP2);
 950                         d = reg_of_var(iptr->dst, REG_ITMP3);
 951                         M_LSUB(s1, s2, d, REG);
 952                         store_reg_to_var_int(iptr->dst, d);
 953                         break;
 954
 955                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 956                                       /* val.l = constant                             */
 957
 958                         var_to_reg_int(s1, src, REG_ITMP1);
 959                         d = reg_of_var(iptr->dst, REG_ITMP3);
 960                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 961                                 M_LSUB(s1, iptr->val.l, d, CONST);
 962                                 }
 963                         else {
 964                                 LCONST(REG_ITMP2, iptr->val.l);
 965                                 M_LSUB(s1, REG_ITMP2, d, REG);
 966                                 }
 967                         store_reg_to_var_int(iptr->dst, d);
 968                         break;
 969
 970                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 971
 972                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 973                         var_to_reg_int(s2, src, REG_ITMP2);
 974                         d = reg_of_var(iptr->dst, REG_ITMP3);
 975                         M_IMUL(s1, s2, d, REG);
 976                         store_reg_to_var_int(iptr->dst, d);
 977                         break;
 978
 979                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 980                                       /* val.i = constant                             */
 981
 982                         var_to_reg_int(s1, src, REG_ITMP1);
 983                         d = reg_of_var(iptr->dst, REG_ITMP3);
 984                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 985                                 M_IMUL(s1, iptr->val.i, d, CONST);
 986                                 }
 987                         else {
 988                                 ICONST(REG_ITMP2, iptr->val.i);
 989                                 M_IMUL(s1, REG_ITMP2, d, REG);
 990                                 }
 991                         store_reg_to_var_int(iptr->dst, d);
 992                         break;
 993
 994                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 995
 996                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 997                         var_to_reg_int(s2, src, REG_ITMP2);
 998                         d = reg_of_var(iptr->dst, REG_ITMP3);
 999                         M_LMUL (s1, s2, d, REG);
1000                         store_reg_to_var_int(iptr->dst, d);
1001                         break;
1002
1003                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1004                                       /* val.l = constant                             */
1005
1006                         var_to_reg_int(s1, src, REG_ITMP1);
1007                         d = reg_of_var(iptr->dst, REG_ITMP3);
1008                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1009                                 M_LMUL(s1, iptr->val.l, d, CONST);
1010                                 }
1011                         else {
1012                                 LCONST(REG_ITMP2, iptr->val.l);
1013                                 M_LMUL(s1, REG_ITMP2, d, REG);
1014                                 }
1015                         store_reg_to_var_int(iptr->dst, d);
1016                         break;
1017
1018                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1019                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1020
1021                         var_to_reg_int(s1, src, REG_ITMP1);
1022                         d = reg_of_var(iptr->dst, REG_ITMP3);
1023                         if (iptr->val.i <= 15) {
1024                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
1025                                 M_CMOVGE(s1, s1, REG_ITMP2, REG);
1026                                 }
1027                         else {
1028                                 M_SRA(s1, 63, REG_ITMP2, CONST);
1029                                 M_SRL(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2, CONST);
1030                                 M_LADD(s1, REG_ITMP2, REG_ITMP2, REG);
1031                                 }
1032                         M_SRA(REG_ITMP2, iptr->val.i, d, CONST);
1033                         store_reg_to_var_int(iptr->dst, d);
1034                         break;
1035
1036                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1037
1038                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1039                         var_to_reg_int(s2, src, REG_ITMP2);
1040                         d = reg_of_var(iptr->dst, REG_ITMP3);
1041                         M_AND(s2, 0x1f, REG_ITMP3, CONST);
1042                         M_SLL(s1, REG_ITMP3, d, REG);
1043                         M_IADD(d, REG_ZERO, d, REG);
1044                         store_reg_to_var_int(iptr->dst, d);
1045                         break;
1046
1047                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1048                                       /* val.i = constant                             */
1049
1050                         var_to_reg_int(s1, src, REG_ITMP1);
1051                         d = reg_of_var(iptr->dst, REG_ITMP3);
1052                         M_SLL(s1, iptr->val.i & 0x1f, d, CONST);
1053                         M_IADD(d, REG_ZERO, d, REG);
1054                         store_reg_to_var_int(iptr->dst, d);
1055                         break;
1056
1057                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1058
1059                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1060                         var_to_reg_int(s2, src, REG_ITMP2);
1061                         d = reg_of_var(iptr->dst, REG_ITMP3);
1062                         M_AND(s2, 0x1f, REG_ITMP3,  1);
1063                         M_SRA(s1, REG_ITMP3, d,   0);
1064                         store_reg_to_var_int(iptr->dst, d);
1065                         break;
1066
1067                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1068                                       /* val.i = constant                             */
1069
1070                         var_to_reg_int(s1, src, REG_ITMP1);
1071                         d = reg_of_var(iptr->dst, REG_ITMP3);
1072                         M_SRA(s1, iptr->val.i & 0x1f, d, CONST);
1073                         store_reg_to_var_int(iptr->dst, d);
1074                         break;
1075
1076                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1077
1078                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1079                         var_to_reg_int(s2, src, REG_ITMP2);
1080                         d = reg_of_var(iptr->dst, REG_ITMP3);
1081                         M_AND  (s2, 0x1f, REG_ITMP2,  1);
1082             M_IZEXT(s1, d);
1083                         M_SRL  ( d, REG_ITMP2, d, REG);
1084                         M_IADD ( d, REG_ZERO, d, REG);
1085                         store_reg_to_var_int(iptr->dst, d);
1086                         break;
1087
1088                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1089                                       /* val.i = constant                             */
1090
1091                         var_to_reg_int(s1, src, REG_ITMP1);
1092                         d = reg_of_var(iptr->dst, REG_ITMP3);
1093             M_IZEXT(s1, d);
1094                         M_SRL(d, iptr->val.i & 0x1f, d, CONST);
1095                         M_IADD(d, REG_ZERO, d, REG);
1096                         store_reg_to_var_int(iptr->dst, d);
1097                         break;
1098
1099                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1100
1101                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1102                         var_to_reg_int(s2, src, REG_ITMP2);
1103                         d = reg_of_var(iptr->dst, REG_ITMP3);
1104                         M_SLL(s1, s2, d, REG);
1105                         store_reg_to_var_int(iptr->dst, d);
1106                         break;
1107
1108                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1109                                       /* val.l = constant                             */
1110
1111                         var_to_reg_int(s1, src, REG_ITMP1);
1112                         d = reg_of_var(iptr->dst, REG_ITMP3);
1113                         M_SLL(s1, iptr->val.l & 0x3f, d, CONST);
1114                         store_reg_to_var_int(iptr->dst, d);
1115                         break;
1116
1117                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1118
1119                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1120                         var_to_reg_int(s2, src, REG_ITMP2);
1121                         d = reg_of_var(iptr->dst, REG_ITMP3);
1122                         M_SRA(s1, s2, d,  0);
1123                         store_reg_to_var_int(iptr->dst, d);
1124                         break;
1125
1126                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1127                                       /* val.l = constant                             */
1128
1129                         var_to_reg_int(s1, src, REG_ITMP1);
1130                         d = reg_of_var(iptr->dst, REG_ITMP3);
1131                         M_SRA(s1, iptr->val.l & 0x3f, d, CONST);
1132                         store_reg_to_var_int(iptr->dst, d);
1133                         break;
1134
1135                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1136
1137                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1138                         var_to_reg_int(s2, src, REG_ITMP2);
1139                         d = reg_of_var(iptr->dst, REG_ITMP3);
1140                         M_SRL(s1, s2, d,  0);
1141                         store_reg_to_var_int(iptr->dst, d);
1142                         break;
1143
1144                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1145                                       /* val.l = constant                             */
1146
1147                         var_to_reg_int(s1, src, REG_ITMP1);
1148                         d = reg_of_var(iptr->dst, REG_ITMP3);
1149                         M_SRL(s1, iptr->val.l & 0x3f, d, CONST);
1150                         store_reg_to_var_int(iptr->dst, d);
1151                         break;
1152
1153                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1154                 case ICMD_LAND:
1155
1156                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1157                         var_to_reg_int(s2, src, REG_ITMP2);
1158                         d = reg_of_var(iptr->dst, REG_ITMP3);
1159                         M_AND(s1, s2, d, REG);
1160                         store_reg_to_var_int(iptr->dst, d);
1161                         break;
1162
1163                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1164                                       /* val.i = constant                             */
1165
1166                         var_to_reg_int(s1, src, REG_ITMP1);
1167                         d = reg_of_var(iptr->dst, REG_ITMP3);
1168                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1169                                 M_AND(s1, iptr->val.i, d, CONST);
1170                                 }
1171                         else if (iptr->val.i == 0xffff) {
1172                                 M_CZEXT(s1, d);
1173                                 }
1174                         else if (iptr->val.i == 0xffffff) {
1175                                 M_ZAPNOT(s1, 0x07, d, CONST);
1176                                 }
1177                         else {
1178                                 ICONST(REG_ITMP2, iptr->val.i);
1179                                 M_AND(s1, REG_ITMP2, d, REG);
1180                                 }
1181                         store_reg_to_var_int(iptr->dst, d);
1182                         break;
1183
1184                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1185                                       /* val.i = constant                             */
1186
1187                         var_to_reg_int(s1, src, REG_ITMP1);
1188                         d = reg_of_var(iptr->dst, REG_ITMP3);
1189                         if (s1 == d) {
1190                                 M_MOV(s1, REG_ITMP1);
1191                                 s1 = REG_ITMP1;
1192                                 }
1193                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1194                                 M_AND(s1, iptr->val.i, d, CONST);
1195                                 M_BGEZ(s1, 3);
1196                                 M_ISUB(REG_ZERO, s1, d, REG);
1197                                 M_AND(d, iptr->val.i, d, CONST);
1198                                 }
1199                         else if (iptr->val.i == 0xffff) {
1200                                 M_CZEXT(s1, d);
1201                                 M_BGEZ(s1, 3);
1202                                 M_ISUB(REG_ZERO, s1, d, REG);
1203                                 M_CZEXT(d, d);
1204                                 }
1205                         else if (iptr->val.i == 0xffffff) {
1206                                 M_ZAPNOT(s1, 0x07, d, CONST);
1207                                 M_BGEZ(s1, 3);
1208                                 M_ISUB(REG_ZERO, s1, d, REG);
1209                                 M_ZAPNOT(d, 0x07, d, CONST);
1210                                 }
1211                         else {
1212                                 ICONST(REG_ITMP2, iptr->val.i);
1213                                 M_AND(s1, REG_ITMP2, d, REG);
1214                                 M_BGEZ(s1, 3);
1215                                 M_ISUB(REG_ZERO, s1, d, REG);
1216                                 M_AND(d, REG_ITMP2, d, REG);
1217                                 }
1218                         M_ISUB(REG_ZERO, d, d, REG);
1219                         store_reg_to_var_int(iptr->dst, d);
1220                         break;
1221
1222                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1223
1224 /*          b = value & 0xffff;
1225                         a = value >> 16;
1226                         a = ((b - a) & 0xffff) + (b < a);
1227 */
1228                         var_to_reg_int(s1, src, REG_ITMP1);
1229                         d = reg_of_var(iptr->dst, REG_ITMP3);
1230                         if (s1 == d) {
1231                                 M_MOV(s1, REG_ITMP3);
1232                                 s1 = REG_ITMP3;
1233                                 }
1234                         M_BLTZ(s1, 7);
1235             M_CZEXT(s1, REG_ITMP2);
1236                         M_SRA(s1, 16, d, CONST);
1237                         M_CMPLT(REG_ITMP2, d, REG_ITMP1, REG);
1238                         M_ISUB(REG_ITMP2, d, d, REG);
1239             M_CZEXT(d, d);
1240                         M_IADD(d, REG_ITMP1, d, REG);
1241                         M_BR(11 + (s1 == REG_ITMP1));
1242                         M_ISUB(REG_ZERO, s1, REG_ITMP1, REG);
1243             M_CZEXT(REG_ITMP1, REG_ITMP2);
1244                         M_SRA(REG_ITMP1, 16, d, CONST);
1245                         M_CMPLT(REG_ITMP2, d, REG_ITMP1, REG);
1246                         M_ISUB(REG_ITMP2, d, d, REG);
1247             M_CZEXT(d, d);
1248                         M_IADD(d, REG_ITMP1, d, REG);
1249                         M_ISUB(REG_ZERO, d, d, REG);
1250                         if (s1 == REG_ITMP1) {
1251                                 var_to_reg_int(s1, src, REG_ITMP1);
1252                                 }
1253                         M_SLL(s1, 33, REG_ITMP2, CONST);
1254                         M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2, REG);
1255                         M_ISUB(d, REG_ITMP2, d, REG);
1256                         store_reg_to_var_int(iptr->dst, d);
1257                         break;
1258
1259                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1260                                       /* val.l = constant                             */
1261
1262                         var_to_reg_int(s1, src, REG_ITMP1);
1263                         d = reg_of_var(iptr->dst, REG_ITMP3);
1264                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1265                                 M_AND(s1, iptr->val.l, d, CONST);
1266                                 }
1267                         else if (iptr->val.l == 0xffffL) {
1268                                 M_CZEXT(s1, d);
1269                                 }
1270                         else if (iptr->val.l == 0xffffffL) {
1271                                 M_ZAPNOT(s1, 0x07, d, CONST);
1272                                 }
1273                         else if (iptr->val.l == 0xffffffffL) {
1274                                 M_IZEXT(s1, d);
1275                                 }
1276                         else if (iptr->val.l == 0xffffffffffL) {
1277                                 M_ZAPNOT(s1, 0x1f, d, CONST);
1278                                 }
1279                         else if (iptr->val.l == 0xffffffffffffL) {
1280                                 M_ZAPNOT(s1, 0x3f, d, CONST);
1281                                 }
1282                         else if (iptr->val.l == 0xffffffffffffffL) {
1283                                 M_ZAPNOT(s1, 0x7f, d, CONST);
1284                                 }
1285                         else {
1286                                 LCONST(REG_ITMP2, iptr->val.l);
1287                                 M_AND(s1, REG_ITMP2, d, REG);
1288                                 }
1289                         store_reg_to_var_int(iptr->dst, d);
1290                         break;
1291
1292                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1293                                       /* val.l = constant                             */
1294
1295                         var_to_reg_int(s1, src, REG_ITMP1);
1296                         d = reg_of_var(iptr->dst, REG_ITMP3);
1297                         if (s1 == d) {
1298                                 M_MOV(s1, REG_ITMP1);
1299                                 s1 = REG_ITMP1;
1300                                 }
1301                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1302                                 M_AND(s1, iptr->val.l, d, CONST);
1303                                 M_BGEZ(s1, 3);
1304                                 M_LSUB(REG_ZERO, s1, d, REG);
1305                                 M_AND(d, iptr->val.l, d, CONST);
1306                                 }
1307                         else if (iptr->val.l == 0xffffL) {
1308                                 M_CZEXT(s1, d);
1309                                 M_BGEZ(s1, 3);
1310                                 M_LSUB(REG_ZERO, s1, d, REG);
1311                                 M_CZEXT(d, d);
1312                                 }
1313                         else if (iptr->val.l == 0xffffffL) {
1314                                 M_ZAPNOT(s1, 0x07, d, CONST);
1315                                 M_BGEZ(s1, 3);
1316                                 M_LSUB(REG_ZERO, s1, d, REG);
1317                                 M_ZAPNOT(d, 0x07, d, CONST);
1318                                 }
1319                         else if (iptr->val.l == 0xffffffffL) {
1320                                 M_IZEXT(s1, d);
1321                                 M_BGEZ(s1, 3);
1322                                 M_LSUB(REG_ZERO, s1, d, REG);
1323                                 M_IZEXT(d, d);
1324                                 }
1325                         else if (iptr->val.l == 0xffffffffffL) {
1326                                 M_ZAPNOT(s1, 0x1f, d, CONST);
1327                                 M_BGEZ(s1, 3);
1328                                 M_LSUB(REG_ZERO, s1, d, REG);
1329                                 M_ZAPNOT(d, 0x1f, d, CONST);
1330                                 }
1331                         else if (iptr->val.l == 0xffffffffffffL) {
1332                                 M_ZAPNOT(s1, 0x3f, d, CONST);
1333                                 M_BGEZ(s1, 3);
1334                                 M_LSUB(REG_ZERO, s1, d, REG);
1335                                 M_ZAPNOT(d, 0x3f, d, CONST);
1336                                 }
1337                         else if (iptr->val.l == 0xffffffffffffffL) {
1338                                 M_ZAPNOT(s1, 0x7f, d, CONST);
1339                                 M_BGEZ(s1, 3);
1340                                 M_LSUB(REG_ZERO, s1, d, REG);
1341                                 M_ZAPNOT(d, 0x7f, d, CONST);
1342                                 }
1343                         else {
1344                                 LCONST(REG_ITMP2, iptr->val.l);
1345                                 M_AND(s1, REG_ITMP2, d, REG);
1346                                 M_BGEZ(s1, 3);
1347                                 M_LSUB(REG_ZERO, s1, d, REG);
1348                                 M_AND(d, REG_ITMP2, d, REG);
1349                                 }
1350                         M_LSUB(REG_ZERO, d, d, REG);
1351                         store_reg_to_var_int(iptr->dst, d);
1352                         break;
1353
1354                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1355
1356                         var_to_reg_int(s1, src, REG_ITMP1);
1357                         d = reg_of_var(iptr->dst, REG_ITMP3);
1358                         if (s1 == d) {
1359                                 M_MOV(s1, REG_ITMP3);
1360                                 s1 = REG_ITMP3;
1361                                 }
1362                         M_CZEXT(s1, REG_ITMP2);
1363                         M_SRA(s1, 16, d, CONST);
1364                         M_CMPLT(REG_ITMP2, d, REG_ITMP1, REG);
1365                         M_LSUB(REG_ITMP2, d, d, REG);
1366             M_CZEXT(d, d);
1367                         M_LADD(d, REG_ITMP1, d, REG);
1368                         M_LDA(REG_ITMP2, REG_ZERO, -1);
1369                         M_SRL(REG_ITMP2, 33, REG_ITMP2, CONST);
1370                         if (s1 == REG_ITMP1) {
1371                                 var_to_reg_int(s1, src, REG_ITMP1);
1372                                 }
1373                         M_CMPULT(s1, REG_ITMP2, REG_ITMP2, REG);
1374                         M_BNEZ(REG_ITMP2, 11);
1375                         M_LDA(d, REG_ZERO, -257);
1376                         M_ZAPNOT(d, 0xcd, d, CONST);
1377                         M_LSUB(REG_ZERO, s1, REG_ITMP2, REG);
1378                         M_CMOVGE(s1, s1, REG_ITMP2, REG);
1379                         M_UMULH(REG_ITMP2, d, REG_ITMP2, REG);
1380                         M_SRL(REG_ITMP2, 16, REG_ITMP2, CONST);
1381                         M_LSUB(REG_ZERO, REG_ITMP2, d, REG);
1382                         M_CMOVGE(s1, REG_ITMP2, d, REG);
1383                         M_SLL(d, 16, REG_ITMP2, CONST);
1384                         M_LADD(d, REG_ITMP2, d, REG);
1385                         M_LSUB(s1, d, d, REG);
1386                         store_reg_to_var_int(iptr->dst, d);
1387                         break;
1388
1389                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1390                 case ICMD_LOR:
1391
1392                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1393                         var_to_reg_int(s2, src, REG_ITMP2);
1394                         d = reg_of_var(iptr->dst, REG_ITMP3);
1395                         M_OR( s1,s2, d, REG);
1396                         store_reg_to_var_int(iptr->dst, d);
1397                         break;
1398
1399                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1400                                       /* val.i = constant                             */
1401
1402                         var_to_reg_int(s1, src, REG_ITMP1);
1403                         d = reg_of_var(iptr->dst, REG_ITMP3);
1404                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1405                                 M_OR(s1, iptr->val.i, d, CONST);
1406                                 }
1407                         else {
1408                                 ICONST(REG_ITMP2, iptr->val.i);
1409                                 M_OR(s1, REG_ITMP2, d, REG);
1410                                 }
1411                         store_reg_to_var_int(iptr->dst, d);
1412                         break;
1413
1414                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1415                                       /* val.l = constant                             */
1416
1417                         var_to_reg_int(s1, src, REG_ITMP1);
1418                         d = reg_of_var(iptr->dst, REG_ITMP3);
1419                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1420                                 M_OR(s1, iptr->val.l, d, CONST);
1421                                 }
1422                         else {
1423                                 LCONST(REG_ITMP2, iptr->val.l);
1424                                 M_OR(s1, REG_ITMP2, d, REG);
1425                                 }
1426                         store_reg_to_var_int(iptr->dst, d);
1427                         break;
1428
1429                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1430                 case ICMD_LXOR:
1431
1432                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1433                         var_to_reg_int(s2, src, REG_ITMP2);
1434                         d = reg_of_var(iptr->dst, REG_ITMP3);
1435                         M_XOR(s1, s2, d, REG);
1436                         store_reg_to_var_int(iptr->dst, d);
1437                         break;
1438
1439                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1440                                       /* val.i = constant                             */
1441
1442                         var_to_reg_int(s1, src, REG_ITMP1);
1443                         d = reg_of_var(iptr->dst, REG_ITMP3);
1444                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1445                                 M_XOR(s1, iptr->val.i, d, CONST);
1446                                 }
1447                         else {
1448                                 ICONST(REG_ITMP2, iptr->val.i);
1449                                 M_XOR(s1, REG_ITMP2, d, REG);
1450                                 }
1451                         store_reg_to_var_int(iptr->dst, d);
1452                         break;
1453
1454                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1455                                       /* val.l = constant                             */
1456
1457                         var_to_reg_int(s1, src, REG_ITMP1);
1458                         d = reg_of_var(iptr->dst, REG_ITMP3);
1459                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1460                                 M_XOR(s1, iptr->val.l, d, CONST);
1461                                 }
1462                         else {
1463                                 LCONST(REG_ITMP2, iptr->val.l);
1464                                 M_XOR(s1, REG_ITMP2, d, REG);
1465                                 }
1466                         store_reg_to_var_int(iptr->dst, d);
1467                         break;
1468
1469
1470                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1471
1472                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1473                         var_to_reg_int(s2, src, REG_ITMP2);
1474                         d = reg_of_var(iptr->dst, REG_ITMP3);
1475                         M_CMPLT(s1, s2, REG_ITMP3, REG);
1476                         M_CMPLT(s2, s1, REG_ITMP1, REG);
1477                         M_LSUB (REG_ITMP1, REG_ITMP3, d, REG);
1478                         store_reg_to_var_int(iptr->dst, d);
1479                         break;
1480
1481
1482                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1483                                       /* op1 = variable, val.i = constant             */
1484
1485                         var = &(locals[iptr->op1][TYPE_INT]);
1486                         if (var->flags & INMEMORY) {
1487                                 s1 = REG_ITMP1;
1488                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1489                                 }
1490                         else
1491                                 s1 = var->regoff;
1492                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1493                                 M_IADD(s1, iptr->val.i, s1, CONST);
1494                                 }
1495                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1496                                 M_ISUB(s1, (-iptr->val.i), s1, CONST);
1497                                 }
1498                         else {
1499                                 M_LDA (s1, s1, iptr->val.i);
1500                                 M_IADD(s1, REG_ZERO, s1, REG);
1501                                 }
1502                         if (var->flags & INMEMORY)
1503                                 M_LST(s1, REG_SP, 8 * var->regoff);
1504                         break;
1505
1506
1507                 /* floating operations ************************************************/
1508
1509                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1510
1511                         var_to_reg_flt(s1, src, REG_FTMP1);
1512                         d = reg_of_var(iptr->dst, REG_FTMP3);
1513                         M_FMOVN(s1, d);
1514                         store_reg_to_var_flt(iptr->dst, d);
1515                         break;
1516
1517                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1518
1519                         var_to_reg_flt(s1, src, REG_FTMP1);
1520                         d = reg_of_var(iptr->dst, REG_FTMP3);
1521                         M_FMOVN(s1, d);
1522                         store_reg_to_var_flt(iptr->dst, d);
1523                         break;
1524
1525                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1526
1527                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1528                         var_to_reg_flt(s2, src, REG_FTMP2);
1529                         d = reg_of_var(iptr->dst, REG_FTMP3);
1530                         if (checkfloats) {
1531                                 M_FADDS(s1, s2, d);
1532                                 M_TRAPB;
1533                                 }
1534                         else {
1535                                 M_FADD(s1, s2, d);
1536                                 }
1537                         store_reg_to_var_flt(iptr->dst, d);
1538                         break;
1539
1540                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1541
1542                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1543                         var_to_reg_flt(s2, src, REG_FTMP2);
1544                         d = reg_of_var(iptr->dst, REG_FTMP3);
1545                         if (checkfloats) {
1546                                 M_DADDS(s1, s2, d);
1547                                 M_TRAPB;
1548                                 }
1549                         else {
1550                                 M_DADD(s1, s2, d);
1551                                 }
1552                         store_reg_to_var_flt(iptr->dst, d);
1553                         break;
1554
1555                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1556
1557                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1558                         var_to_reg_flt(s2, src, REG_FTMP2);
1559                         d = reg_of_var(iptr->dst, REG_FTMP3);
1560                         if (checkfloats) {
1561                                 M_FSUBS(s1, s2, d);
1562                                 M_TRAPB;
1563                                 }
1564                         else {
1565                                 M_FSUB(s1, s2, d);
1566                                 }
1567                         store_reg_to_var_flt(iptr->dst, d);
1568                         break;
1569
1570                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1571
1572                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1573                         var_to_reg_flt(s2, src, REG_FTMP2);
1574                         d = reg_of_var(iptr->dst, REG_FTMP3);
1575                         if (checkfloats) {
1576                                 M_DSUBS(s1, s2, d);
1577                                 M_TRAPB;
1578                                 }
1579                         else {
1580                                 M_DSUB(s1, s2, d);
1581                                 }
1582                         store_reg_to_var_flt(iptr->dst, d);
1583                         break;
1584
1585                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1586
1587                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1588                         var_to_reg_flt(s2, src, REG_FTMP2);
1589                         d = reg_of_var(iptr->dst, REG_FTMP3);
1590                         if (checkfloats) {
1591                                 M_FMULS(s1, s2, d);
1592                                 M_TRAPB;
1593                                 }
1594                         else {
1595                                 M_FMUL(s1, s2, d);
1596                                 }
1597                         store_reg_to_var_flt(iptr->dst, d);
1598                         break;
1599
1600                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1601
1602                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1603                         var_to_reg_flt(s2, src, REG_FTMP2);
1604                         d = reg_of_var(iptr->dst, REG_FTMP3);
1605                         if (checkfloats) {
1606                                 M_DMULS(s1, s2, d);
1607                                 M_TRAPB;
1608                                 }
1609                         else {
1610                                 M_DMUL(s1, s2, d);
1611                                 }
1612                         store_reg_to_var_flt(iptr->dst, d);
1613                         break;
1614
1615                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1616
1617                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1618                         var_to_reg_flt(s2, src, REG_FTMP2);
1619                         d = reg_of_var(iptr->dst, REG_FTMP3);
1620                         if (checkfloats) {
1621                                 M_FDIVS(s1, s2, d);
1622                                 M_TRAPB;
1623                                 }
1624                         else {
1625                                 M_FDIV(s1, s2, d);
1626                                 }
1627                         store_reg_to_var_flt(iptr->dst, d);
1628                         break;
1629
1630                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1631
1632                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1633                         var_to_reg_flt(s2, src, REG_FTMP2);
1634                         d = reg_of_var(iptr->dst, REG_FTMP3);
1635                         if (checkfloats) {
1636                                 M_DDIVS(s1, s2, d);
1637                                 M_TRAPB;
1638                                 }
1639                         else {
1640                                 M_DDIV(s1, s2, d);
1641                                 }
1642                         store_reg_to_var_flt(iptr->dst, d);
1643                         break;
1644
1645                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1646
1647                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1648                         var_to_reg_flt(s2, src, REG_FTMP2);
1649                         d = reg_of_var(iptr->dst, REG_FTMP3);
1650                         if (checkfloats) {
1651                                 M_FDIVS(s1,s2, REG_FTMP3);
1652                                 M_TRAPB;
1653                                 M_CVTDL_CS(REG_ZERO, REG_FTMP3, REG_FTMP3); /* round to integer */
1654                                 M_TRAPB;
1655                                 M_CVTLF(REG_ZERO, REG_FTMP3, REG_FTMP3);
1656                                 M_FMULS(REG_FTMP3, s2, REG_FTMP3);
1657                                 M_TRAPB;
1658                                 M_FSUBS(s1, REG_FTMP3, d);
1659                                 M_TRAPB;
1660                                 }
1661                         else {
1662                                 M_FDIV(s1,s2, REG_FTMP3);
1663                                 M_CVTDL_C(REG_ZERO, REG_FTMP3, REG_FTMP3); /* round to integer */
1664                                 M_CVTLF(REG_ZERO, REG_FTMP3, REG_FTMP3);
1665                                 M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1666                                 M_FSUB(s1, REG_FTMP3, d);
1667                                 }
1668                         store_reg_to_var_flt(iptr->dst, d);
1669                     break;
1670
1671                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1672
1673                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1674                         var_to_reg_flt(s2, src, REG_FTMP2);
1675                         d = reg_of_var(iptr->dst, REG_FTMP3);
1676                         if (checkfloats) {
1677                                 M_DDIVS(s1,s2, REG_FTMP3);
1678                                 M_TRAPB;
1679                                 M_CVTDL_CS(REG_ZERO, REG_FTMP3, REG_FTMP3); /* round to integer */
1680                                 M_TRAPB;
1681                                 M_CVTLD(REG_ZERO, REG_FTMP3, REG_FTMP3);
1682                                 M_DMULS(REG_FTMP3, s2, REG_FTMP3);
1683                                 M_TRAPB;
1684                                 M_DSUBS(s1, REG_FTMP3, d);
1685                                 M_TRAPB;
1686                                 }
1687                         else {
1688                                 M_DDIV(s1,s2, REG_FTMP3);
1689                                 M_CVTDL_C(REG_ZERO, REG_FTMP3, REG_FTMP3); /* round to integer */
1690                                 M_CVTLD(REG_ZERO, REG_FTMP3, REG_FTMP3);
1691                                 M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1692                                 M_DSUB(s1, REG_FTMP3, d);
1693                                 }
1694                         store_reg_to_var_flt(iptr->dst, d);
1695                     break;
1696
1697                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1698                 case ICMD_L2F:
1699                         var_to_reg_int(s1, src, REG_ITMP1);
1700                         d = reg_of_var(iptr->dst, REG_FTMP3);
1701                         a = dseg_adddouble(0.0);
1702                         M_LST (s1, REG_PV, a);
1703                         M_DLD (d, REG_PV, a);
1704                         M_CVTLF(REG_ZERO, d, d);
1705                         store_reg_to_var_flt(iptr->dst, d);
1706                         break;
1707
1708                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1709                 case ICMD_L2D:
1710                         var_to_reg_int(s1, src, REG_ITMP1);
1711                         d = reg_of_var(iptr->dst, REG_FTMP3);
1712                         a = dseg_adddouble(0.0);
1713                         M_LST (s1, REG_PV, a);
1714                         M_DLD (d, REG_PV, a);
1715                         M_CVTLD(REG_ZERO, d, d);
1716                         store_reg_to_var_flt(iptr->dst, d);
1717                         break;
1718
1719                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1720                 case ICMD_D2I:
1721                         var_to_reg_flt(s1, src, REG_FTMP1);
1722                         d = reg_of_var(iptr->dst, REG_ITMP3);
1723                         a = dseg_adddouble(0.0);
1724                         if (checkfloats) {
1725                                 M_CVTDL_CS(REG_ZERO, s1, REG_FTMP1);
1726                                 M_TRAPB;
1727                                 M_CVTLIS(REG_FTMP1, REG_FTMP2);
1728                                 M_TRAPB;
1729                                 }
1730                         else {
1731                                 M_CVTDL_C(REG_ZERO, s1, REG_FTMP1);
1732                                 M_CVTLI(REG_FTMP1, REG_FTMP2);
1733                                 }
1734                         M_DST (REG_FTMP1, REG_PV, a);
1735                         M_ILD (d, REG_PV, a);
1736                         store_reg_to_var_int(iptr->dst, d);
1737                         break;
1738
1739                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1740                 case ICMD_D2L:
1741                         var_to_reg_flt(s1, src, REG_FTMP1);
1742                         d = reg_of_var(iptr->dst, REG_ITMP3);
1743                         a = dseg_adddouble(0.0);
1744                         if (checkfloats) {
1745                                 M_CVTDL_CS(REG_ZERO, s1, REG_FTMP1);
1746                                 M_TRAPB;
1747                                 }
1748                         else {
1749                                 M_CVTDL_C(REG_ZERO, s1, REG_FTMP1);
1750                                 }
1751                         M_DST (REG_FTMP1, REG_PV, a);
1752                         M_LLD (d, REG_PV, a);
1753                         store_reg_to_var_int(iptr->dst, d);
1754                         break;
1755
1756                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1757
1758                         var_to_reg_flt(s1, src, REG_FTMP1);
1759                         d = reg_of_var(iptr->dst, REG_FTMP3);
1760                         M_FLTMOVE(s1, d);
1761                         store_reg_to_var_flt(iptr->dst, d);
1762                         break;
1763
1764                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1765
1766                         var_to_reg_flt(s1, src, REG_FTMP1);
1767                         d = reg_of_var(iptr->dst, REG_FTMP3);
1768                         if (checkfloats) {
1769                                 M_CVTDFS(REG_ZERO, s1, d);
1770                                 M_TRAPB;
1771                                 }
1772                         else {
1773                                 M_CVTDF(REG_ZERO, s1, d);
1774                                 }
1775                         store_reg_to_var_flt(iptr->dst, d);
1776                         break;
1777
1778                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1779                 case ICMD_DCMPL:
1780                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1781                         var_to_reg_flt(s2, src, REG_FTMP2);
1782                         d = reg_of_var(iptr->dst, REG_ITMP3);
1783                         if (checkfloats) {
1784                                 M_LSUB  (REG_ZERO, 1, d, CONST);
1785                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1786                                 M_TRAPB;
1787                                 M_FBEQZ (REG_FTMP3, CONST);    /* jump over next instructions */
1788                                 M_CLR   (d);
1789                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1790                                 M_TRAPB;
1791                                 M_FBEQZ (REG_FTMP3, CONST);    /* jump over next instruction  */
1792                                 M_LADD  (REG_ZERO, 1, d, CONST);
1793                                 }
1794                         else {
1795                                 M_LSUB  (REG_ZERO, 1, d, CONST);
1796                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1797                                 M_FBEQZ (REG_FTMP3, CONST);    /* jump over next instructions */
1798                                 M_CLR   (d);
1799                                 M_FCMPLT(s2, s1, REG_FTMP3);
1800                                 M_FBEQZ (REG_FTMP3, CONST);    /* jump over next instruction  */
1801                                 M_LADD  (REG_ZERO, 1, d, CONST);
1802                                 }
1803                         store_reg_to_var_int(iptr->dst, d);
1804                         break;
1805
1806                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1807                 case ICMD_DCMPG:
1808                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1809                         var_to_reg_flt(s2, src, REG_FTMP2);
1810                         d = reg_of_var(iptr->dst, REG_ITMP3);
1811                         if (checkfloats) {
1812                                 M_LADD  (REG_ZERO, 1, d, CONST);
1813                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1814                                 M_TRAPB;
1815                                 M_FBEQZ (REG_FTMP3, CONST);    /* jump over next instruction  */
1816                                 M_CLR   (d);
1817                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1818                                 M_TRAPB;
1819                                 M_FBEQZ (REG_FTMP3, CONST);    /* jump over next instruction  */
1820                                 M_LSUB  (REG_ZERO, 1, d, CONST);
1821                                 }
1822                         else {
1823                                 M_LADD  (REG_ZERO, 1, d, CONST);
1824                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1825                                 M_FBEQZ (REG_FTMP3, CONST);    /* jump over next instruction  */
1826                                 M_CLR   (d);
1827                                 M_FCMPLT(s1, s2, REG_FTMP3);
1828                                 M_FBEQZ (REG_FTMP3, CONST);    /* jump over next instruction  */
1829                                 M_LSUB  (REG_ZERO, 1, d, CONST);
1830                                 }
1831                         store_reg_to_var_int(iptr->dst, d);
1832                         break;
1833
1834
1835                 /* memory operations **************************************************/
1836
1837 #define gen_bound_check \
1838                         if (checkbounds) {\
1839                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1840                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3, REG);\
1841                                 M_BEQZ(REG_ITMP3, REG);\
1842                                 mcode_addxboundrefs(mcodeptr);\
1843                                 }
1844
1845                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1846
1847                         var_to_reg_int(s1, src, REG_ITMP1);
1848                         d = reg_of_var(iptr->dst, REG_ITMP3);
1849                         gen_nullptr_check(s1);
1850                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1851                         store_reg_to_var_int(iptr->dst, d);
1852                         break;
1853
1854                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1855
1856                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1857                         var_to_reg_int(s2, src, REG_ITMP2);
1858                         d = reg_of_var(iptr->dst, REG_ITMP3);
1859                         gen_nullptr_check(s1);
1860                         gen_bound_check;
1861                         M_SAADDQ(s2, s1, REG_ITMP1, REG);
1862                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1863                         store_reg_to_var_int(iptr->dst, d);
1864                         break;
1865
1866                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1867
1868                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1869                         var_to_reg_int(s2, src, REG_ITMP2);
1870                         d = reg_of_var(iptr->dst, REG_ITMP3);
1871                         gen_nullptr_check(s1);
1872                         gen_bound_check;
1873                         M_S8ADDQ(s2, s1, REG_ITMP1, REG);
1874                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1875                         store_reg_to_var_int(iptr->dst, d);
1876                         break;
1877
1878                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1879
1880                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1881                         var_to_reg_int(s2, src, REG_ITMP2);
1882                         d = reg_of_var(iptr->dst, REG_ITMP3);
1883                         gen_nullptr_check(s1);
1884                         gen_bound_check;
1885                         M_S4ADDQ(s2, s1, REG_ITMP1, REG);
1886                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1887                         store_reg_to_var_int(iptr->dst, d);
1888                         break;
1889
1890                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1891
1892                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1893                         var_to_reg_int(s2, src, REG_ITMP2);
1894                         d = reg_of_var(iptr->dst, REG_FTMP3);
1895                         gen_nullptr_check(s1);
1896                         gen_bound_check;
1897                         M_S4ADDQ(s2, s1, REG_ITMP1, REG);
1898                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1899                         store_reg_to_var_flt(iptr->dst, d);
1900                         break;
1901
1902                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1903
1904                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1905                         var_to_reg_int(s2, src, REG_ITMP2);
1906                         d = reg_of_var(iptr->dst, REG_FTMP3);
1907                         gen_nullptr_check(s1);
1908                         gen_bound_check;
1909                         M_S8ADDQ(s2, s1, REG_ITMP1, REG);
1910                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1911                         store_reg_to_var_flt(iptr->dst, d);
1912                         break;
1913
1914                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1915
1916                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1917                         var_to_reg_int(s2, src, REG_ITMP2);
1918                         d = reg_of_var(iptr->dst, REG_ITMP3);
1919                         gen_nullptr_check(s1);
1920                         gen_bound_check;
1921                         if (has_ext_instr_set) {
1922                                 M_LADD(s2, s1, REG_ITMP1, REG);
1923                                 M_LADD(s2, REG_ITMP1, REG_ITMP1, REG);
1924                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1925                                 }
1926                         else {
1927                                 M_LADD (s2, s1, REG_ITMP1,  0);
1928                                 M_LADD (s2, REG_ITMP1, REG_ITMP1, REG);
1929                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1930                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1931                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d, REG);
1932                                 }
1933                         store_reg_to_var_int(iptr->dst, d);
1934                         break;
1935
1936                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1937
1938                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1939                         var_to_reg_int(s2, src, REG_ITMP2);
1940                         d = reg_of_var(iptr->dst, REG_ITMP3);
1941                         gen_nullptr_check(s1);
1942                         gen_bound_check;
1943                         if (has_ext_instr_set) {
1944                                 M_LADD(s2, s1, REG_ITMP1, REG);
1945                                 M_LADD(s2, REG_ITMP1, REG_ITMP1, REG);
1946                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1947                                 M_SSEXT(d, d);
1948                                 }
1949                         else {
1950                                 M_LADD(s2, s1, REG_ITMP1,  0);
1951                                 M_LADD(s2, REG_ITMP1, REG_ITMP1, REG);
1952                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1953                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1954                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d, REG);
1955                                 M_SRA(d, 48, d, CONST);
1956                                 }
1957                         store_reg_to_var_int(iptr->dst, d);
1958                         break;
1959
1960                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1961
1962                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1963                         var_to_reg_int(s2, src, REG_ITMP2);
1964                         d = reg_of_var(iptr->dst, REG_ITMP3);
1965                         gen_nullptr_check(s1);
1966                         gen_bound_check;
1967                         if (has_ext_instr_set) {
1968                                 M_LADD   (s2, s1, REG_ITMP1, REG);
1969                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1970                                 M_BSEXT  (d, d);
1971                                 }
1972                         else {
1973                                 M_LADD(s2, s1, REG_ITMP1, REG);
1974                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1975                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1976                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d, REG);
1977                                 M_SRA(d, 56, d, CONST);
1978                                 }
1979                         store_reg_to_var_int(iptr->dst, d);
1980                         break;
1981
1982
1983                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1984
1985                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1986                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1987                         gen_nullptr_check(s1);
1988                         gen_bound_check;
1989                         var_to_reg_int(s3, src, REG_ITMP3);
1990                         M_SAADDQ(s2, s1, REG_ITMP1, REG);
1991                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1992                         break;
1993
1994                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1995
1996                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1997                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1998                         gen_nullptr_check(s1);
1999                         gen_bound_check;
2000                         var_to_reg_int(s3, src, REG_ITMP3);
2001                         M_S8ADDQ(s2, s1, REG_ITMP1, REG);
2002                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2003                         break;
2004
2005                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2006
2007                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2008                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2009                         gen_nullptr_check(s1);
2010                         gen_bound_check;
2011                         var_to_reg_int(s3, src, REG_ITMP3);
2012                         M_S4ADDQ(s2, s1, REG_ITMP1, REG);
2013                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2014                         break;
2015
2016                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2017
2018                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2019                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2020                         gen_nullptr_check(s1);
2021                         gen_bound_check;
2022                         var_to_reg_flt(s3, src, REG_FTMP3);
2023                         M_S4ADDQ(s2, s1, REG_ITMP1, REG);
2024                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2025                         break;
2026
2027                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2028
2029                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2030                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2031                         gen_nullptr_check(s1);
2032                         gen_bound_check;
2033                         var_to_reg_flt(s3, src, REG_FTMP3);
2034                         M_S8ADDQ(s2, s1, REG_ITMP1, REG);
2035                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2036                         break;
2037
2038                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2039
2040                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2041                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2042                         gen_nullptr_check(s1);
2043                         gen_bound_check;
2044                         var_to_reg_int(s3, src, REG_ITMP3);
2045                         if (has_ext_instr_set) {
2046                                 M_LADD(s2, s1, REG_ITMP1, REG);
2047                                 M_LADD(s2, REG_ITMP1, REG_ITMP1, REG);
2048                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2049                                 }
2050                         else {
2051                                 M_LADD (s2, s1, REG_ITMP1, REG);
2052                                 M_LADD (s2, REG_ITMP1, REG_ITMP1, REG);
2053                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2054                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2055                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3, REG);
2056                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2, REG);
2057                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2, REG);
2058                                 M_LST_U(REG_ITMP2, REG_ITMP1, REG);
2059                                 }
2060                         break;
2061
2062                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2063
2064                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2065                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2066                         gen_nullptr_check(s1);
2067                         gen_bound_check;
2068                         var_to_reg_int(s3, src, REG_ITMP3);
2069                         if (has_ext_instr_set) {
2070                                 M_LADD(s2, s1, REG_ITMP1, REG);
2071                                 M_LADD(s2, REG_ITMP1, REG_ITMP1, REG);
2072                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2073                                 }
2074                         else {
2075                                 M_LADD (s2, s1, REG_ITMP1, REG);
2076                                 M_LADD (s2, REG_ITMP1, REG_ITMP1, REG);
2077                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2078                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2079                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3, REG);
2080                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2, REG);
2081                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2, REG);
2082                                 M_LST_U(REG_ITMP2, REG_ITMP1, REG);
2083                                 }
2084                         break;
2085
2086                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2087
2088                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2089                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2090                         gen_nullptr_check(s1);
2091                         gen_bound_check;
2092                         var_to_reg_int(s3, src, REG_ITMP3);
2093                         if (has_ext_instr_set) {
2094                                 M_LADD(s2, s1, REG_ITMP1, REG);
2095                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2096                                 }
2097                         else {
2098                                 M_LADD (s2, s1, REG_ITMP1,  0);
2099                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2100                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2101                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3, REG);
2102                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2, REG);
2103                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2, REG);
2104                                 M_LST_U(REG_ITMP2, REG_ITMP1, REG);
2105                                 }
2106                         break;
2107
2108
2109                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2110                                       /* op1 = type, val.a = field address            */
2111
2112                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2113                         M_ALD(REG_ITMP1, REG_PV, a);
2114                         switch (iptr->op1) {
2115                                 case TYPE_INT:
2116                                         var_to_reg_int(s2, src, REG_ITMP2);
2117                                         M_IST(s2, REG_ITMP1, REG);
2118                                         break;
2119                                 case TYPE_LNG:
2120                                         var_to_reg_int(s2, src, REG_ITMP2);
2121                                         M_LST(s2, REG_ITMP1, REG);
2122                                         break;
2123                                 case TYPE_ADR:
2124                                         var_to_reg_int(s2, src, REG_ITMP2);
2125                                         M_AST(s2, REG_ITMP1, REG);
2126                                         break;
2127                                 case TYPE_FLT:
2128                                         var_to_reg_flt(s2, src, REG_FTMP2);
2129                                         M_FST(s2, REG_ITMP1, REG);
2130                                         break;
2131                                 case TYPE_DBL:
2132                                         var_to_reg_flt(s2, src, REG_FTMP2);
2133                                         M_DST(s2, REG_ITMP1, REG);
2134                                         break;
2135                                 default: panic ("internal error");
2136                                 }
2137                         break;
2138
2139                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2140                                       /* op1 = type, val.a = field address            */
2141
2142                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2143                         M_ALD(REG_ITMP1, REG_PV, a);
2144                         switch (iptr->op1) {
2145                                 case TYPE_INT:
2146                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2147                                         M_ILD(d, REG_ITMP1, REG);
2148                                         store_reg_to_var_int(iptr->dst, d);
2149                                         break;
2150                                 case TYPE_LNG:
2151                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2152                                         M_LLD(d, REG_ITMP1, REG);
2153                                         store_reg_to_var_int(iptr->dst, d);
2154                                         break;
2155                                 case TYPE_ADR:
2156                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2157                                         M_ALD(d, REG_ITMP1, REG);
2158                                         store_reg_to_var_int(iptr->dst, d);
2159                                         break;
2160                                 case TYPE_FLT:
2161                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2162                                         M_FLD(d, REG_ITMP1, REG);
2163                                         store_reg_to_var_flt(iptr->dst, d);
2164                                         break;
2165                                 case TYPE_DBL:
2166                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2167                                         M_DLD(d, REG_ITMP1, REG);
2168                                         store_reg_to_var_flt(iptr->dst, d);
2169                                         break;
2170                                 default: panic ("internal error");
2171                                 }
2172                         break;
2173
2174
2175                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2176                                       /* op1 = type, val.i = field offset             */
2177
2178                         a = ((fieldinfo *)(iptr->val.a))->offset;
2179                         switch (iptr->op1) {
2180                                 case TYPE_INT:
2181                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2182                                         var_to_reg_int(s2, src, REG_ITMP2);
2183                                         gen_nullptr_check(s1);
2184                                         M_IST(s2, s1, a);
2185                                         break;
2186                                 case TYPE_LNG:
2187                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2188                                         var_to_reg_int(s2, src, REG_ITMP2);
2189                                         gen_nullptr_check(s1);
2190                                         M_LST(s2, s1, a);
2191                                         break;
2192                                 case TYPE_ADR:
2193                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2194                                         var_to_reg_int(s2, src, REG_ITMP2);
2195                                         gen_nullptr_check(s1);
2196                                         M_AST(s2, s1, a);
2197                                         break;
2198                                 case TYPE_FLT:
2199                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2200                                         var_to_reg_flt(s2, src, REG_FTMP2);
2201                                         gen_nullptr_check(s1);
2202                                         M_FST(s2, s1, a);
2203                                         break;
2204                                 case TYPE_DBL:
2205                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2206                                         var_to_reg_flt(s2, src, REG_FTMP2);
2207                                         gen_nullptr_check(s1);
2208                                         M_DST(s2, s1, a);
2209                                         break;
2210                                 default: panic ("internal error");
2211                                 }
2212                         break;
2213
2214                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2215                                       /* op1 = type, val.i = field offset             */
2216
2217                         a = ((fieldinfo *)(iptr->val.a))->offset;
2218                         switch (iptr->op1) {
2219                                 case TYPE_INT:
2220                                         var_to_reg_int(s1, src, REG_ITMP1);
2221                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2222                                         gen_nullptr_check(s1);
2223                                         M_ILD(d, s1, a);
2224                                         store_reg_to_var_int(iptr->dst, d);
2225                                         break;
2226                                 case TYPE_LNG:
2227                                         var_to_reg_int(s1, src, REG_ITMP1);
2228                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2229                                         gen_nullptr_check(s1);
2230                                         M_LLD(d, s1, a);
2231                                         store_reg_to_var_int(iptr->dst, d);
2232                                         break;
2233                                 case TYPE_ADR:
2234                                         var_to_reg_int(s1, src, REG_ITMP1);
2235                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2236                                         gen_nullptr_check(s1);
2237                                         M_ALD(d, s1, a);
2238                                         store_reg_to_var_int(iptr->dst, d);
2239                                         break;
2240                                 case TYPE_FLT:
2241                                         var_to_reg_int(s1, src, REG_ITMP1);
2242                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2243                                         gen_nullptr_check(s1);
2244                                         M_FLD(d, s1, a);
2245                                         store_reg_to_var_flt(iptr->dst, d);
2246                                         break;
2247                                 case TYPE_DBL:
2248                                         var_to_reg_int(s1, src, REG_ITMP1);
2249                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2250                                         gen_nullptr_check(s1);
2251                                         M_DLD(d, s1, a);
2252                                         store_reg_to_var_flt(iptr->dst, d);
2253                                         break;
2254                                 default: panic ("internal error");
2255                                 }
2256                         break;
2257
2258
2259                 /* branch operations **************************************************/
2260
2261 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2262
2263                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2264
2265                         var_to_reg_int(s1, src, REG_ITMP1);
2266                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2267                         a = dseg_addaddress(asm_handle_exception);
2268                         M_ALD(REG_ITMP2, REG_PV, a);
2269                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2270                         ALIGNCODENOP;
2271                         break;
2272
2273                 case ICMD_GOTO:         /* ... ==> ...                                */
2274                                         /* op1 = target JavaVM pc                     */
2275                         M_BR(0);
2276                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2277                         ALIGNCODENOP;
2278                         break;
2279
2280                 case ICMD_JSR:          /* ... ==> ...                                */
2281                                         /* op1 = target JavaVM pc                     */
2282
2283                         M_BSR(REG_ITMP1, REG);
2284                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2285                         break;
2286
2287                 case ICMD_RET:          /* ... ==> ...                                */
2288                                         /* op1 = local variable                       */
2289
2290                         var = &(locals[iptr->op1][TYPE_ADR]);
2291                         if (var->flags & INMEMORY) {
2292                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2293                                 M_RET(REG_ZERO, REG_ITMP1);
2294                                 }
2295                         else
2296                                 M_RET(REG_ZERO, var->regoff);
2297                         ALIGNCODENOP;
2298                         break;
2299
2300                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2301                                         /* op1 = target JavaVM pc                     */
2302
2303                         var_to_reg_int(s1, src, REG_ITMP1);
2304                         M_BEQZ(s1, REG);
2305                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2306                         break;
2307
2308                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2309                                         /* op1 = target JavaVM pc                     */
2310
2311                         var_to_reg_int(s1, src, REG_ITMP1);
2312                         M_BNEZ(s1, REG);
2313                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2314                         break;
2315
2316                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2317                                         /* op1 = target JavaVM pc, val.i = constant   */
2318
2319                         var_to_reg_int(s1, src, REG_ITMP1);
2320                         if (iptr->val.i == 0) {
2321                                 M_BEQZ(s1, REG);
2322                                 }
2323                         else {
2324                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2325                                         M_CMPEQ(s1, iptr->val.i, REG_ITMP1, CONST);
2326                                         }
2327                                 else {
2328                                         ICONST(REG_ITMP2, iptr->val.i);
2329                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1, REG);
2330                                         }
2331                                 M_BNEZ(REG_ITMP1, REG);
2332                                 }
2333                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2334                         break;
2335
2336                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2337                                         /* op1 = target JavaVM pc, val.i = constant   */
2338
2339                         var_to_reg_int(s1, src, REG_ITMP1);
2340                         if (iptr->val.i == 0) {
2341                                 M_BLTZ(s1, REG);
2342                                 }
2343                         else {
2344                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2345                                         M_CMPLT(s1, iptr->val.i, REG_ITMP1, CONST);
2346                                         }
2347                                 else {
2348                                         ICONST(REG_ITMP2, iptr->val.i);
2349                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1, REG);
2350                                         }
2351                                 M_BNEZ(REG_ITMP1, REG);
2352                                 }
2353                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2354                         break;
2355
2356                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2357                                         /* op1 = target JavaVM pc, val.i = constant   */
2358
2359                         var_to_reg_int(s1, src, REG_ITMP1);
2360                         if (iptr->val.i == 0) {
2361                                 M_BLEZ(s1, REG);
2362                                 }
2363                         else {
2364                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2365                                         M_CMPLE(s1, iptr->val.i, REG_ITMP1, CONST);
2366                                         }
2367                                 else {
2368                                         ICONST(REG_ITMP2, iptr->val.i);
2369                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1, REG);
2370                                         }
2371                                 M_BNEZ(REG_ITMP1, REG);
2372                                 }
2373                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2374                         break;
2375
2376                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2377                                         /* op1 = target JavaVM pc, val.i = constant   */
2378
2379                         var_to_reg_int(s1, src, REG_ITMP1);
2380                         if (iptr->val.i == 0) {
2381                                 M_BNEZ(s1, REG);
2382                                 }
2383                         else {
2384                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2385                                         M_CMPEQ(s1, iptr->val.i, REG_ITMP1, CONST);
2386                                         }
2387                                 else {
2388                                         ICONST(REG_ITMP2, iptr->val.i);
2389                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1, REG);
2390                                         }
2391                                 M_BEQZ(REG_ITMP1, REG);
2392                                 }
2393                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2394                         break;
2395
2396                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2397                                         /* op1 = target JavaVM pc, val.i = constant   */
2398
2399                         var_to_reg_int(s1, src, REG_ITMP1);
2400                         if (iptr->val.i == 0) {
2401                                 M_BGTZ(s1, REG);
2402                                 }
2403                         else {
2404                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2405                                         M_CMPLE(s1, iptr->val.i, REG_ITMP1, CONST);
2406                                         }
2407                                 else {
2408                                         ICONST(REG_ITMP2, iptr->val.i);
2409                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1, REG);
2410                                         }
2411                                 M_BEQZ(REG_ITMP1, REG);
2412                                 }
2413                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2414                         break;
2415
2416                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2417                                         /* op1 = target JavaVM pc, val.i = constant   */
2418
2419                         var_to_reg_int(s1, src, REG_ITMP1);
2420                         if (iptr->val.i == 0) {
2421                                 M_BGEZ(s1, REG);
2422                                 }
2423                         else {
2424                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2425                                         M_CMPLT(s1, iptr->val.i, REG_ITMP1, CONST);
2426                                         }
2427                                 else {
2428                                         ICONST(REG_ITMP2, iptr->val.i);
2429                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1, REG);
2430                                         }
2431                                 M_BEQZ(REG_ITMP1, REG);
2432                                 }
2433                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2434                         break;
2435
2436                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2437                                         /* op1 = target JavaVM pc, val.l = constant   */
2438
2439                         var_to_reg_int(s1, src, REG_ITMP1);
2440                         if (iptr->val.l == 0) {
2441                                 M_BEQZ(s1, REG);
2442                                 }
2443                         else {
2444                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2445                                         M_CMPEQ(s1, iptr->val.l, REG_ITMP1, CONST);
2446                                         }
2447                                 else {
2448                                         LCONST(REG_ITMP2, iptr->val.l);
2449                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1, REG);
2450                                         }
2451                                 M_BNEZ(REG_ITMP1, REG);
2452                                 }
2453                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2454                         break;
2455
2456                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2457                                         /* op1 = target JavaVM pc, val.l = constant   */
2458
2459                         var_to_reg_int(s1, src, REG_ITMP1);
2460                         if (iptr->val.l == 0) {
2461                                 M_BLTZ(s1, REG);
2462                                 }
2463                         else {
2464                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2465                                         M_CMPLT(s1, iptr->val.l, REG_ITMP1, CONST);
2466                                         }
2467                                 else {
2468                                         LCONST(REG_ITMP2, iptr->val.l);
2469                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1, REG);
2470                                         }
2471                                 M_BNEZ(REG_ITMP1, REG);
2472                                 }
2473                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2474                         break;
2475
2476                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2477                                         /* op1 = target JavaVM pc, val.l = constant   */
2478
2479                         var_to_reg_int(s1, src, REG_ITMP1);
2480                         if (iptr->val.l == 0) {
2481                                 M_BLEZ(s1, REG);
2482                                 }
2483                         else {
2484                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2485                                         M_CMPLE(s1, iptr->val.l, REG_ITMP1, CONST);
2486                                         }
2487                                 else {
2488                                         LCONST(REG_ITMP2, iptr->val.l);
2489                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1, REG);
2490                                         }
2491                                 M_BNEZ(REG_ITMP1, REG);
2492                                 }
2493                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2494                         break;
2495
2496                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2497                                         /* op1 = target JavaVM pc, val.l = constant   */
2498
2499                         var_to_reg_int(s1, src, REG_ITMP1);
2500                         if (iptr->val.l == 0) {
2501                                 M_BNEZ(s1, REG);
2502                                 }
2503                         else {
2504                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2505                                         M_CMPEQ(s1, iptr->val.l, REG_ITMP1, CONST);
2506                                         }
2507                                 else {
2508                                         LCONST(REG_ITMP2, iptr->val.l);
2509                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1, REG);
2510                                         }
2511                                 M_BEQZ(REG_ITMP1, REG);
2512                                 }
2513                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2514                         break;
2515
2516                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2517                                         /* op1 = target JavaVM pc, val.l = constant   */
2518
2519                         var_to_reg_int(s1, src, REG_ITMP1);
2520                         if (iptr->val.l == 0) {
2521                                 M_BGTZ(s1, REG);
2522                                 }
2523                         else {
2524                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2525                                         M_CMPLE(s1, iptr->val.l, REG_ITMP1, CONST);
2526                                         }
2527                                 else {
2528                                         LCONST(REG_ITMP2, iptr->val.l);
2529                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1, REG);
2530                                         }
2531                                 M_BEQZ(REG_ITMP1, REG);
2532                                 }
2533                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2534                         break;
2535
2536                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2537                                         /* op1 = target JavaVM pc, val.l = constant   */
2538
2539                         var_to_reg_int(s1, src, REG_ITMP1);
2540                         if (iptr->val.l == 0) {
2541                                 M_BGEZ(s1, REG);
2542                                 }
2543                         else {
2544                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2545                                         M_CMPLT(s1, iptr->val.l, REG_ITMP1, CONST);
2546                                         }
2547                                 else {
2548                                         LCONST(REG_ITMP2, iptr->val.l);
2549                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1, REG);
2550                                         }
2551                                 M_BEQZ(REG_ITMP1, REG);
2552                                 }
2553                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2554                         break;
2555
2556                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2557                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2558                 case ICMD_IF_ACMPEQ:
2559
2560                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2561                         var_to_reg_int(s2, src, REG_ITMP2);
2562                         M_CMPEQ(s1, s2, REG_ITMP1, REG);
2563                         M_BNEZ(REG_ITMP1, REG);
2564                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2565                         break;
2566
2567                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2568                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2569                 case ICMD_IF_ACMPNE:
2570
2571                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2572                         var_to_reg_int(s2, src, REG_ITMP2);
2573                         M_CMPEQ(s1, s2, REG_ITMP1, REG);
2574                         M_BEQZ(REG_ITMP1, REG);
2575                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2576                         break;
2577
2578                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2579                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2580
2581                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2582                         var_to_reg_int(s2, src, REG_ITMP2);
2583                         M_CMPLT(s1, s2, REG_ITMP1, REG);
2584                         M_BNEZ(REG_ITMP1, REG);
2585                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2586                         break;
2587
2588                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2589                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2590
2591                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2592                         var_to_reg_int(s2, src, REG_ITMP2);
2593                         M_CMPLE(s1, s2, REG_ITMP1, REG);
2594                         M_BEQZ(REG_ITMP1, REG);
2595                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2596                         break;
2597
2598                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2599                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2600
2601                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2602                         var_to_reg_int(s2, src, REG_ITMP2);
2603                         M_CMPLE(s1, s2, REG_ITMP1, REG);
2604                         M_BNEZ(REG_ITMP1, REG);
2605                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2606                         break;
2607
2608                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2609                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2610
2611                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2612                         var_to_reg_int(s2, src, REG_ITMP2);
2613                         M_CMPLT(s1, s2, REG_ITMP1,  0);
2614                         M_BEQZ(REG_ITMP1, REG);
2615                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2616                         break;
2617
2618                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2619
2620                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2621                         break;
2622
2623                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2624                                         /* val.i = constant                           */
2625
2626                         var_to_reg_int(s1, src, REG_ITMP1);
2627                         d = reg_of_var(iptr->dst, REG_ITMP3);
2628                         a = iptr->val.i;
2629                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2630                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2631                                         M_CMPEQ(s1, REG_ZERO, d,  0);
2632                                         store_reg_to_var_int(iptr->dst, d);
2633                                         break;
2634                                         }
2635                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2636                                         M_CMPEQ(s1, REG_ZERO, d,  0);
2637                                         M_XOR(d, 1, d, CONST);
2638                                         store_reg_to_var_int(iptr->dst, d);
2639                                         break;
2640                                         }
2641                                 if (s1 == d) {
2642                                         M_MOV(s1, REG_ITMP1);
2643                                         s1 = REG_ITMP1;
2644                                         }
2645                                 ICONST(d, iptr[1].val.i);
2646                                 }
2647                         if ((a >= 0) && (a <= 255)) {
2648                                 M_CMOVEQ(s1, a, d, CONST);
2649                                 }
2650                         else {
2651                                 ICONST(REG_ITMP2, a);
2652                                 M_CMOVEQ(s1, REG_ITMP2, d, REG);
2653                                 }
2654                         store_reg_to_var_int(iptr->dst, d);
2655                         break;
2656
2657                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2658                                         /* val.i = constant                           */
2659
2660                         var_to_reg_int(s1, src, REG_ITMP1);
2661                         d = reg_of_var(iptr->dst, REG_ITMP3);
2662                         a = iptr->val.i;
2663                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2664                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2665                                         M_CMPEQ(s1, REG_ZERO, d,  0);
2666                                         store_reg_to_var_int(iptr->dst, d);
2667                                         break;
2668                                         }
2669                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2670                                         M_CMPEQ(s1, REG_ZERO, d,  0);
2671                                         M_XOR(d, 1, d, CONST);
2672                                         store_reg_to_var_int(iptr->dst, d);
2673                                         break;
2674                                         }
2675                                 if (s1 == d) {
2676                                         M_MOV(s1, REG_ITMP1);
2677                                         s1 = REG_ITMP1;
2678                                         }
2679                                 ICONST(d, iptr[1].val.i);
2680                                 }
2681                         if ((a >= 0) && (a <= 255)) {
2682                                 M_CMOVNE(s1, a, d, CONST);
2683                                 }
2684                         else {
2685                                 ICONST(REG_ITMP2, a);
2686                                 M_CMOVNE(s1, REG_ITMP2, d, REG);
2687                                 }
2688                         store_reg_to_var_int(iptr->dst, d);
2689                         break;
2690
2691                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2692                                         /* val.i = constant                           */
2693
2694                         var_to_reg_int(s1, src, REG_ITMP1);
2695                         d = reg_of_var(iptr->dst, REG_ITMP3);
2696                         a = iptr->val.i;
2697                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2698                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2699                                         M_CMPLT(s1, REG_ZERO, d,  0);
2700                                         store_reg_to_var_int(iptr->dst, d);
2701                                         break;
2702                                         }
2703                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2704                                         M_CMPLE(REG_ZERO, s1, d,  0);
2705                                         store_reg_to_var_int(iptr->dst, d);
2706                                         break;
2707                                         }
2708                                 if (s1 == d) {
2709                                         M_MOV(s1, REG_ITMP1);
2710                                         s1 = REG_ITMP1;
2711                                         }
2712                                 ICONST(d, iptr[1].val.i);
2713                                 }
2714                         if ((a >= 0) && (a <= 255)) {
2715                                 M_CMOVLT(s1, a, d, CONST);
2716                                 }
2717                         else {
2718                                 ICONST(REG_ITMP2, a);
2719                                 M_CMOVLT(s1, REG_ITMP2, d, REG);
2720                                 }
2721                         store_reg_to_var_int(iptr->dst, d);
2722                         break;
2723
2724                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2725                                         /* val.i = constant                           */
2726
2727                         var_to_reg_int(s1, src, REG_ITMP1);
2728                         d = reg_of_var(iptr->dst, REG_ITMP3);
2729                         a = iptr->val.i;
2730                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2731                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2732                                         M_CMPLE(REG_ZERO, s1, d,  0);
2733                                         store_reg_to_var_int(iptr->dst, d);
2734                                         break;
2735                                         }
2736                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2737                                         M_CMPLT(s1, REG_ZERO, d,  0);
2738                                         store_reg_to_var_int(iptr->dst, d);
2739                                         break;
2740                                         }
2741                                 if (s1 == d) {
2742                                         M_MOV(s1, REG_ITMP1);
2743                                         s1 = REG_ITMP1;
2744                                         }
2745                                 ICONST(d, iptr[1].val.i);
2746                                 }
2747                         if ((a >= 0) && (a <= 255)) {
2748                                 M_CMOVGE(s1, a, d, CONST);
2749                                 }
2750                         else {
2751                                 ICONST(REG_ITMP2, a);
2752                                 M_CMOVGE(s1, REG_ITMP2, d, REG);
2753                                 }
2754                         store_reg_to_var_int(iptr->dst, d);
2755                         break;
2756
2757                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2758                                         /* val.i = constant                           */
2759
2760                         var_to_reg_int(s1, src, REG_ITMP1);
2761                         d = reg_of_var(iptr->dst, REG_ITMP3);
2762                         a = iptr->val.i;
2763                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2764                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2765                                         M_CMPLT(REG_ZERO, s1, d,  0);
2766                                         store_reg_to_var_int(iptr->dst, d);
2767                                         break;
2768                                         }
2769                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2770                                         M_CMPLE(s1, REG_ZERO, d,  0);
2771                                         store_reg_to_var_int(iptr->dst, d);
2772                                         break;
2773                                         }
2774                                 if (s1 == d) {
2775                                         M_MOV(s1, REG_ITMP1);
2776                                         s1 = REG_ITMP1;
2777                                         }
2778                                 ICONST(d, iptr[1].val.i);
2779                                 }
2780                         if ((a >= 0) && (a <= 255)) {
2781                                 M_CMOVGT(s1, a, d, CONST);
2782                                 }
2783                         else {
2784                                 ICONST(REG_ITMP2, a);
2785                                 M_CMOVGT(s1, REG_ITMP2, d, REG);
2786                                 }
2787                         store_reg_to_var_int(iptr->dst, d);
2788                         break;
2789
2790                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2791                                         /* val.i = constant                           */
2792
2793                         var_to_reg_int(s1, src, REG_ITMP1);
2794                         d = reg_of_var(iptr->dst, REG_ITMP3);
2795                         a = iptr->val.i;
2796                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2797                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2798                                         M_CMPLE(s1, REG_ZERO, d,  0);
2799                                         store_reg_to_var_int(iptr->dst, d);
2800                                         break;
2801                                         }
2802                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2803                                         M_CMPLT(REG_ZERO, s1, d,  0);
2804                                         store_reg_to_var_int(iptr->dst, d);
2805                                         break;
2806                                         }
2807                                 if (s1 == d) {
2808                                         M_MOV(s1, REG_ITMP1);
2809                                         s1 = REG_ITMP1;
2810                                         }
2811                                 ICONST(d, iptr[1].val.i);
2812                                 }
2813                         if ((a >= 0) && (a <= 255)) {
2814                                 M_CMOVLE(s1, a, d, CONST);
2815                                 }
2816                         else {
2817                                 ICONST(REG_ITMP2, a);
2818                                 M_CMOVLE(s1, REG_ITMP2, d, REG);
2819                                 }
2820                         store_reg_to_var_int(iptr->dst, d);
2821                         break;
2822
2823
2824                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2825                 case ICMD_LRETURN:
2826                 case ICMD_ARETURN:
2827
2828 #ifdef USE_THREADS
2829                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2830                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2831                                 M_ALD(REG_PV, REG_PV, a);
2832                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
2833                                 M_JSR(REG_RA, REG_PV);
2834                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
2835                                 }
2836 #endif
2837                         var_to_reg_int(s1, src, REG_RESULT);
2838                         M_INTMOVE(s1, REG_RESULT);
2839                         goto nowperformreturn;
2840
2841                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2842                 case ICMD_DRETURN:
2843
2844 #ifdef USE_THREADS
2845                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2846                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2847                                 M_ALD(REG_PV, REG_PV, a);
2848                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
2849                                 M_JSR(REG_RA, REG_PV);
2850                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
2851                                 }
2852 #endif
2853                         var_to_reg_flt(s1, src, REG_FRESULT);
2854                         M_FLTMOVE(s1, REG_FRESULT);
2855                         goto nowperformreturn;
2856
2857                 case ICMD_RETURN:      /* ...  ==> ...                                */
2858
2859 #ifdef USE_THREADS
2860                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2861                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2862                                 M_ALD(REG_PV, REG_PV, a);
2863                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
2864                                 M_JSR(REG_RA, REG_PV);
2865                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
2866                                 }
2867 #endif
2868
2869 nowperformreturn:
2870                         {
2871                         int r, p;
2872
2873                         p = parentargs_base;
2874
2875                         /* restore return address                                         */
2876
2877                         if (!isleafmethod)
2878                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
2879
2880                         /* restore saved registers                                        */
2881
2882                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
2883                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
2884                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
2885                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
2886
2887                         /* deallocate stack                                               */
2888
2889                         if (parentargs_base)
2890                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
2891
2892                         /* call trace function */
2893
2894                         if (runverbose) {
2895                                 M_LDA (REG_SP, REG_SP, -24);
2896                                 M_AST(REG_RA, REG_SP, REG);
2897                                 M_LST(REG_RESULT, REG_SP, 8);
2898                                 M_DST(REG_FRESULT, REG_SP,16);
2899                                 a = dseg_addaddress (method);
2900                                 M_ALD(argintregs[0], REG_PV, a);
2901                                 M_MOV(REG_RESULT, argintregs[1]);
2902                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
2903                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
2904                                 M_ALD(REG_PV, REG_PV, a);
2905                                 M_JSR (REG_RA, REG_PV);
2906                                 s1 = (int)((u1*) mcodeptr - mcodebase);
2907                                 if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
2908                                 else {
2909                                         s4 ml=-s1, mh=0;
2910                                         while (ml<-32768) { ml+=65536; mh--; }
2911                                         M_LDA (REG_PV, REG_RA, ml );
2912                                         M_LDAH (REG_PV, REG_PV, mh );
2913                                         }
2914                                 M_DLD(REG_FRESULT, REG_SP,16);
2915                                 M_LLD(REG_RESULT, REG_SP, 8);
2916                                 M_ALD(REG_RA, REG_SP, REG);
2917                                 M_LDA (REG_SP, REG_SP, 24);
2918                                 }
2919
2920                         M_RET(REG_ZERO, REG_RA);
2921                         ALIGNCODENOP;
2922                         }
2923                         break;
2924
2925
2926                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2927                         {
2928                         s4 i, l, *s4ptr;
2929
2930                         s4ptr = iptr->val.a;
2931                         l = s4ptr[1];                          /* low     */
2932                         i = s4ptr[2];                          /* high    */
2933
2934                         var_to_reg_int(s1, src, REG_ITMP1);
2935                         if (l == 0)
2936                                 {M_INTMOVE(s1, REG_ITMP1);}
2937                         else
2938                                 M_LDA(REG_ITMP1, s1, -l);
2939                         i = i - l + 1;
2940
2941                         /* range check */
2942
2943                         if (i <= 256)
2944                                 M_CMPULE(REG_ITMP1, i - 1, REG_ITMP2, CONST);
2945                         else {
2946                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
2947                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2, REG);
2948                                 }
2949                         M_BEQZ(REG_ITMP2, REG);
2950                         mcode_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr);
2951
2952                         /* build jump table top down and use address of lowest entry */
2953
2954                         s4ptr += 3 + i;
2955                         while (--i >= 0) {
2956                                 dseg_addtarget(BlockPtrOfPC(*--s4ptr));
2957                                 }
2958                         }
2959
2960                         /* length of dataseg after last dseg_addtarget is used by load */
2961
2962                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2, REG);
2963                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
2964                         M_JMP(REG_ZERO, REG_ITMP2);
2965                         ALIGNCODENOP;
2966                         break;
2967
2968
2969                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2970                         {
2971                         s4 i, l, val, *s4ptr;
2972
2973                         s4ptr = iptr->val.a;
2974                         l = s4ptr[0];                          /* default  */
2975                         i = s4ptr[1];                          /* count    */
2976
2977                         MCODECHECK((i<<2)+8);
2978                         var_to_reg_int(s1, src, REG_ITMP1);
2979                         while (--i >= 0) {
2980                                 s4ptr += 2;
2981                                 val = s4ptr[0];
2982                                 if ((val >= 0) && (val <= 255)) {
2983                                         M_CMPEQ(s1, val, REG_ITMP2, CONST);
2984                                         }
2985                                 else {
2986                                         if ((val >= -32768) && (val <= 32767)) {
2987                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
2988                                                 }
2989                                         else {
2990                                                 a = dseg_adds4 (val);
2991                                                 M_ILD(REG_ITMP2, REG_PV, a);
2992                                                 }
2993                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2, REG);
2994                                         }
2995                                 M_BNEZ(REG_ITMP2, REG);
2996                                 mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr);
2997                                 }
2998
2999                         M_BR(0);
3000                         mcode_addreference(BlockPtrOfPC(l), mcodeptr);
3001                         ALIGNCODENOP;
3002                         break;
3003                         }
3004
3005
3006                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3007                                         /* op1 = return type, val.a = function pointer*/
3008                         s3 = 3;
3009                         goto gen_method;
3010
3011                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3012                                         /* op1 = return type, val.a = function pointer*/
3013                         s3 = 2;
3014                         goto gen_method;
3015
3016                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3017                                         /* op1 = return type, val.a = function pointer*/
3018                         s3 = 1;
3019                         goto gen_method;
3020
3021                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3022                                         /* op1 = arg count, val.a = method pointer    */
3023
3024                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3025                                         /* op1 = arg count, val.a = method pointer    */
3026
3027                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3028                                         /* op1 = arg count, val.a = method pointer    */
3029
3030                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3031                                         /* op1 = arg count, val.a = method pointer    */
3032
3033                         s3 = iptr->op1;
3034
3035 gen_method: {
3036                         methodinfo   *m;
3037                         classinfo    *ci;
3038
3039                         MCODECHECK((s3 << 1) + 64);
3040
3041                         /* copy arguments to registers or stack location                  */
3042
3043                         for (; --s3 >= 0; src = src->prev) {
3044                                 if (src->varkind == ARGVAR)
3045                                         continue;
3046                                 if (IS_INT_LNG_TYPE(src->type)) {
3047                                         if (s3 < INT_ARG_CNT) {
3048                                                 s1 = argintregs[s3];
3049                                                 var_to_reg_int(d, src, s1);
3050                                                 M_INTMOVE(d, s1);
3051                                                 }
3052                                         else  {
3053                                                 var_to_reg_int(d, src, REG_ITMP1);
3054                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3055                                                 }
3056                                         }
3057                                 else
3058                                         if (s3 < FLT_ARG_CNT) {
3059                                                 s1 = argfltregs[s3];
3060                                                 var_to_reg_flt(d, src, s1);
3061                                                 M_FLTMOVE(d, s1);
3062                                                 }
3063                                         else {
3064                                                 var_to_reg_flt(d, src, REG_FTMP1);
3065                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3066                                                 }
3067                                 } /* end of for */
3068
3069                         m = iptr->val.a;
3070                         switch (iptr->opc) {
3071                                 case ICMD_BUILTIN3:
3072                                 case ICMD_BUILTIN2:
3073                                 case ICMD_BUILTIN1:
3074                                         a = dseg_addaddress ((void*) (m));
3075
3076                                         M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3077                                         d = iptr->op1;
3078                                         goto makeactualcall;
3079
3080                                 case ICMD_INVOKESTATIC:
3081                                 case ICMD_INVOKESPECIAL:
3082                                         a = dseg_addaddress (m->stubroutine);
3083
3084                                         M_ALD(REG_PV, REG_PV, a );       /* method pointer in r27 */
3085
3086                                         d = m->returntype;
3087                                         goto makeactualcall;
3088
3089                                 case ICMD_INVOKEVIRTUAL:
3090
3091                                         gen_nullptr_check(argintregs[0]);
3092                                         M_ALD(REG_METHODPTR, argintregs[0],
3093                                                                  OFFSET(java_objectheader, vftbl));
3094                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3095                                                                 sizeof(methodptr) * m->vftblindex);
3096
3097                                         d = m->returntype;
3098                                         goto makeactualcall;
3099
3100                                 case ICMD_INVOKEINTERFACE:
3101                                         ci = m->class;
3102
3103                                         gen_nullptr_check(argintregs[0]);
3104                                         M_ALD(REG_METHODPTR, argintregs[0],
3105                                                                  OFFSET(java_objectheader, vftbl));
3106                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3107                                               OFFSET(vftbl, interfacetable[0]) -
3108                                               sizeof(methodptr*) * ci->index);
3109                                         M_ALD(REG_PV, REG_METHODPTR,
3110                                                             sizeof(methodptr) * (m - ci->methods));
3111
3112                                         d = m->returntype;
3113                                         goto makeactualcall;
3114
3115                                 default:
3116                                         d = 0;
3117                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
3118                                         error ();
3119                                 }
3120
3121 makeactualcall:
3122
3123                         M_JSR (REG_RA, REG_PV);
3124
3125                         /* recompute pv */
3126
3127                         s1 = (int)((u1*) mcodeptr - mcodebase);
3128                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3129                         else {
3130                                 s4 ml=-s1, mh=0;
3131                                 while (ml<-32768) { ml+=65536; mh--; }
3132                                 M_LDA (REG_PV, REG_RA, ml );
3133                                 M_LDAH (REG_PV, REG_PV, mh );
3134                                 }
3135
3136                         /* d contains return type */
3137
3138                         if (d != TYPE_VOID) {
3139                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3140                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3141                                         M_INTMOVE(REG_RESULT, s1);
3142                                         store_reg_to_var_int(iptr->dst, s1);
3143                                         }
3144                                 else {
3145                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3146                                         M_FLTMOVE(REG_FRESULT, s1);
3147                                         store_reg_to_var_flt(iptr->dst, s1);
3148                                         }
3149                                 }
3150                         }
3151                         break;
3152
3153
3154                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3155
3156                                       /* op1:   0 == array, 1 == class                */
3157                                       /* val.a: (classinfo*) superclass               */
3158
3159 /*          superclass is an interface:
3160  *
3161  *          return (sub != NULL) &&
3162  *                 (sub->vftbl->interfacetablelength > super->index) &&
3163  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3164  *
3165  *          superclass is a class:
3166  *
3167  *          return ((sub != NULL) && (0
3168  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3169  *                  super->vftbl->diffvall));
3170  */
3171
3172                         {
3173                         classinfo *super = (classinfo*) iptr->val.a;
3174
3175                         var_to_reg_int(s1, src, REG_ITMP1);
3176                         d = reg_of_var(iptr->dst, REG_ITMP3);
3177                         if (s1 == d) {
3178                                 M_MOV(s1, REG_ITMP1);
3179                                 s1 = REG_ITMP1;
3180                                 }
3181                         M_CLR(d);
3182                         if (iptr->op1) {                               /* class/interface */
3183                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3184                                         M_BEQZ(s1, 6);
3185                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3186                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3187                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3188                                         M_BLEZ(REG_ITMP2, 2);
3189                                         M_ALD(REG_ITMP1, REG_ITMP1,
3190                                               OFFSET(vftbl, interfacetable[0]) -
3191                                               super->index * sizeof(methodptr*));
3192                                         M_CMPULT(REG_ZERO, REG_ITMP1, d, REG); /* REG_ITMP1 != 0  */
3193                                         }
3194                                 else {                                     /* class           */
3195                                         s2 = super->vftbl->diffval;
3196                                         M_BEQZ(s1, 4 + (s2 > 255));
3197                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3198                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3199                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3200                                         if (s2 <= 255)
3201                                                 M_CMPULE(REG_ITMP1, s2, d, CONST);
3202                                         else {
3203                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3204                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d, REG);
3205                                                 }
3206                                         }
3207                                 }
3208                         else
3209                                 panic ("internal error: no inlined array instanceof");
3210                         }
3211                         store_reg_to_var_int(iptr->dst, d);
3212                         break;
3213
3214                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3215
3216                                       /* op1:   0 == array, 1 == class                */
3217                                       /* val.a: (classinfo*) superclass               */
3218
3219 /*          superclass is an interface:
3220  *
3221  *          OK if ((sub == NULL) ||
3222  *                 (sub->vftbl->interfacetablelength > super->index) &&
3223  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3224  *
3225  *          superclass is a class:
3226  *
3227  *          OK if ((sub == NULL) || (0
3228  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3229  *                 super->vftbl->diffvall));
3230  */
3231
3232                         {
3233                         classinfo *super = (classinfo*) iptr->val.a;
3234
3235                         d = reg_of_var(iptr->dst, REG_ITMP3);
3236                         var_to_reg_int(s1, src, d);
3237                         if (iptr->op1) {                               /* class/interface */
3238                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3239                                         M_BEQZ(s1, 6);
3240                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3241                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3242                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3243                                         M_BLEZ(REG_ITMP2, REG);
3244                                         mcode_addxcastrefs(mcodeptr);
3245                                         M_ALD(REG_ITMP2, REG_ITMP1,
3246                                               OFFSET(vftbl, interfacetable[0]) -
3247                                               super->index * sizeof(methodptr*));
3248                                         M_BEQZ(REG_ITMP2, REG);
3249                                         mcode_addxcastrefs(mcodeptr);
3250                                         }
3251                                 else {                                     /* class           */
3252                                         s2 = super->vftbl->diffval;
3253                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3254                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3255                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3256                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3257                                         if (s2 == 0) {
3258                                                 M_BNEZ(REG_ITMP1, REG);
3259                                                 }
3260                                         else if (s2 <= 255) {
3261                                                 M_CMPULE(REG_ITMP1, s2, REG_ITMP2, CONST);
3262                                                 M_BEQZ(REG_ITMP2, REG);
3263                                                 }
3264                                         else {
3265                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3266                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2, REG);
3267                                                 M_BEQZ(REG_ITMP2, REG);
3268                                                 }
3269                                         mcode_addxcastrefs(mcodeptr);
3270                                         }
3271                                 }
3272                         else
3273                                 panic ("internal error: no inlined array checkcast");
3274                         }
3275                         M_INTMOVE(s1, d);
3276                         store_reg_to_var_int(iptr->dst, d);
3277                         break;
3278
3279                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3280
3281                         var_to_reg_int(s1, src, REG_ITMP1);
3282                         M_BLTZ(s1, REG);
3283                         mcode_addxcheckarefs(mcodeptr);
3284                         break;
3285
3286                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3287                                       /* op1 = dimension, val.a = array descriptor    */
3288
3289                         /* check for negative sizes and copy sizes to stack if necessary  */
3290
3291                         MCODECHECK((iptr->op1 << 1) + 64);
3292
3293                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3294                                 var_to_reg_int(s2, src, REG_ITMP1);
3295                                 M_BLTZ(s2, REG);
3296                                 mcode_addxcheckarefs(mcodeptr);
3297
3298                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3299
3300                                 if (src->varkind != ARGVAR) {
3301                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3302                                         }
3303                                 }
3304
3305                         /* a0 = dimension count */
3306
3307                         M_LDA(argintregs[0], REG_ZERO, iptr->op1);
3308
3309                         /* a1 = arraydescriptor */
3310
3311                         a = dseg_addaddress(iptr->val.a);
3312                         M_ALD(argintregs[1], REG_PV, a);
3313
3314                         /* a2 = pointer to dimensions = stack pointer */
3315
3316                         M_INTMOVE(REG_SP, argintregs[2]);
3317
3318                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3319                         M_ALD(REG_PV, REG_PV, a);
3320                         M_JSR(REG_RA, REG_PV);
3321                         s1 = (int)((u1*) mcodeptr - mcodebase);
3322                         if (s1 <= 32768)
3323                                 M_LDA (REG_PV, REG_RA, -s1);
3324                         else {
3325                                 s4 ml = -s1, mh = 0;
3326                                 while (ml < -32768) {ml += 65536; mh--;}
3327                                 M_LDA(REG_PV, REG_RA, ml);
3328                                 M_LDAH(REG_PV, REG_PV, mh);
3329                                 }
3330                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3331                         M_INTMOVE(REG_RESULT, s1);
3332                         store_reg_to_var_int(iptr->dst, s1);
3333                         break;
3334
3335
3336                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3337                          error();
3338         } /* switch */
3339         } /* for instruction */
3340
3341         /* copy values to interface registers */
3342
3343         src = bptr->outstack;
3344         len = bptr->outdepth;
3345         MCODECHECK(64+len);
3346         while (src) {
3347                 len--;
3348                 if ((src->varkind != STACKVAR)) {
3349                         s2 = src->type;
3350                         if (IS_FLT_DBL_TYPE(s2)) {
3351                                 var_to_reg_flt(s1, src, REG_FTMP1);
3352                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3353                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3354                                         }
3355                                 else {
3356                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3357                                         }
3358                                 }
3359                         else {
3360                                 var_to_reg_int(s1, src, REG_ITMP1);
3361                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3362                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3363                                         }
3364                                 else {
3365                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3366                                         }
3367                                 }
3368                         }
3369                 src = src->prev;
3370                 }
3371         } /* if (bptr -> flags >= BBREACHED) */
3372         } /* for basic block */
3373
3374         bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
3375
3376         {
3377         /* generate bound check stubs */
3378
3379         s4 *xcodeptr = NULL;
3380
3381         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3382                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3383                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3384                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3385                         continue;
3386                         }
3387
3388                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3389                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3390
3391                 MCODECHECK(8);
3392
3393                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos);
3394
3395                 if (xcodeptr != NULL) {
3396                         M_BR((xcodeptr-mcodeptr)-1);
3397                         }
3398                 else {
3399                         xcodeptr = mcodeptr;
3400
3401                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3402                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3403
3404                         a = dseg_addaddress(asm_handle_exception);
3405                         M_ALD(REG_ITMP3, REG_PV, a);
3406
3407                         M_JMP(REG_ZERO, REG_ITMP3);
3408                         }
3409                 }
3410
3411         /* generate negative array size check stubs */
3412
3413         xcodeptr = NULL;
3414
3415         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3416                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3417                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3418                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3419                         continue;
3420                         }
3421
3422                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3423                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3424
3425                 MCODECHECK(8);
3426
3427                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos);
3428
3429                 if (xcodeptr != NULL) {
3430                         M_BR((xcodeptr-mcodeptr)-1);
3431                         }
3432                 else {
3433                         xcodeptr = mcodeptr;
3434
3435                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3436                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3437
3438                         a = dseg_addaddress(asm_handle_exception);
3439                         M_ALD(REG_ITMP3, REG_PV, a);
3440
3441                         M_JMP(REG_ZERO, REG_ITMP3);
3442                         }
3443                 }
3444
3445         /* generate cast check stubs */
3446
3447         xcodeptr = NULL;
3448
3449         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3450                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3451                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3452                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3453                         continue;
3454                         }
3455
3456                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3457                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3458
3459                 MCODECHECK(8);
3460
3461                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos);
3462
3463                 if (xcodeptr != NULL) {
3464                         M_BR((xcodeptr-mcodeptr)-1);
3465                         }
3466                 else {
3467                         xcodeptr = mcodeptr;
3468
3469                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3470                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3471
3472                         a = dseg_addaddress(asm_handle_exception);
3473                         M_ALD(REG_ITMP3, REG_PV, a);
3474
3475                         M_JMP(REG_ZERO, REG_ITMP3);
3476                         }
3477                 }
3478
3479
3480 #ifdef SOFTNULLPTRCHECK
3481
3482         /* generate null pointer check stubs */
3483
3484         xcodeptr = NULL;
3485
3486         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3487                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3488                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3489                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3490                         continue;
3491                         }
3492
3493                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3494                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3495
3496                 MCODECHECK(8);
3497
3498                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3499
3500                 if (xcodeptr != NULL) {
3501                         M_BR((xcodeptr-mcodeptr)-1);
3502                         }
3503                 else {
3504                         xcodeptr = mcodeptr;
3505
3506                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3507                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3508
3509                         a = dseg_addaddress(asm_handle_exception);
3510                         M_ALD(REG_ITMP3, REG_PV, a);
3511
3512                         M_JMP(REG_ZERO, REG_ITMP3);
3513                         }
3514                 }
3515
3516 #endif
3517         }
3518
3519         mcode_finish((int)((u1*) mcodeptr - mcodebase));
3520 }
3521
3522
3523 /* redefinition of code generation macros (compiling into array) **************/
3524
3525 /*
3526 These macros are newly defined to allow code generation into an array.
3527 This is necessary, because the original M_.. macros generate code by
3528 calling 'mcode_adds4' that uses an additional data structure to
3529 receive the code.
3530
3531 For a faster (but less flexible) version to generate code, these
3532 macros directly use the (s4* p) - pointer to put the code directly
3533 in a locally defined array.
3534 This makes sense only for the stub-generation-routines below.
3535 */
3536
3537 #undef M_OP3
3538 #define M_OP3(op,fu,a,b,c,const) \
3539         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<(16-3*(const)))| \
3540         ((const)<<12)|((fu)<<5)|((c)) )
3541 #undef M_FOP3
3542 #define M_FOP3(op,fu,a,b,c) \
3543         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((fu)<<5)|(c) )
3544 #undef M_BRA
3545 #define M_BRA(op,a,disp) \
3546         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((disp)&0x1fffff) )
3547 #undef M_MEM
3548 #define M_MEM(op,a,b,disp) \
3549         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((disp)&0xffff) )
3550
3551
3552 /* function createcompilerstub *************************************************
3553
3554         creates a stub routine which calls the compiler
3555
3556 *******************************************************************************/
3557
3558 #define COMPSTUBSIZE 3
3559
3560 u1 *createcompilerstub (methodinfo *m)
3561 {
3562         u8 *s = CNEW (u8, COMPSTUBSIZE);    /* memory to hold the stub            */
3563         s4 *p = (s4*) s;                    /* code generation pointer            */
3564
3565                                             /* code for the stub                  */
3566         M_ALD (REG_PV, REG_PV, 16);         /* load pointer to the compiler       */
3567         M_JMP (0, REG_PV);                  /* jump to the compiler, return address
3568                                                in reg 0 is used as method pointer */
3569         s[1] = (u8) m;                      /* literals to be adressed            */
3570         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3571
3572 #ifdef STATISTICS
3573         count_cstub_len += COMPSTUBSIZE * 8;
3574 #endif
3575
3576         return (u1*) s;
3577 }
3578
3579
3580 /* function removecompilerstub *************************************************
3581
3582      deletes a compilerstub from memory  (simply by freeing it)
3583
3584 *******************************************************************************/
3585
3586 void removecompilerstub (u1 *stub)
3587 {
3588         CFREE (stub, COMPSTUBSIZE * 8);
3589 }
3590
3591
3592 /* function: ncreatenativestub *************************************************
3593
3594         creates a stub routine which calls a native method
3595
3596 *******************************************************************************/
3597
3598 #define NATIVESTUBSIZE 11
3599
3600 u1 *ncreatenativestub (functionptr f, methodinfo *m)
3601 {
3602         u8 *s = CNEW (u8, NATIVESTUBSIZE);  /* memory to hold the stub            */
3603         s4 *p = (s4*) s;                    /* code generation pointer            */
3604
3605         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3606         M_AST  (REG_RA, REG_SP, REG);       /* store return address               */
3607
3608         M_ALD  (REG_PV, REG_PV, 8*8);       /* load adress of native method       */
3609         M_JSR  (REG_RA, REG_PV);            /* call native method                 */
3610
3611         M_LDA  (REG_PV, REG_RA, -4*4);      /* recompute pv from ra               */
3612         M_ALD  (REG_ITMP3, REG_PV, 9*8);    /* get address of exceptionptr        */
3613
3614         M_ALD  (REG_RA, REG_SP, REG);       /* load return address                */
3615         M_ALD  (REG_ITMP1, REG_ITMP3, REG); /* load exception into reg. itmp1     */
3616
3617         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe                  */
3618         M_BNEZ (REG_ITMP1, CONST);          /* if no exception then return        */
3619
3620         M_RET  (REG_ZERO, REG_RA);          /* return to caller                   */
3621
3622         M_AST  (REG_ZERO, REG_ITMP3, REG);  /* store NULL into exceptionptr       */
3623         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3624
3625         M_ALD  (REG_ITMP3, REG_PV,10*8);    /* load asm exception handler address */
3626         M_JMP  (REG_ZERO, REG_ITMP3);       /* jump to asm exception handler      */
3627
3628
3629         s[8] = (u8) f;                      /* address of native method           */
3630         s[9] = (u8) (&exceptionptr);        /* address of exceptionptr            */
3631         s[10]= (u8) (asm_handle_nat_exception); /* addr of asm exception handler  */
3632
3633 #ifdef STATISTICS
3634         count_nstub_len += NATIVESTUBSIZE * 8;
3635 #endif
3636
3637         return (u1*) s;
3638 }
3639
3640
3641 /* function: removenativestub **************************************************
3642
3643     removes a previously created native-stub from memory
3644
3645 *******************************************************************************/
3646
3647 void removenativestub (u1 *stub)
3648 {
3649         CFREE (stub, NATIVESTUBSIZE * 8);
3650 }
3651
3652
3653 /*
3654  * These are local overrides for various environment variables in Emacs.
3655  * Please do not remove this and leave it at the end of the file, where
3656  * Emacs will automagically detect them.
3657  * ---------------------------------------------------------------------
3658  * Local variables:
3659  * mode: c
3660  * indent-tabs-mode: t
3661  * c-basic-offset: 4
3662  * tab-width: 4
3663  * End:
3664  */