alpha/ngen.c

   1 /* alpha/ngen.c ****************************************************************
   2
   3         Copyright (c) 1997 A. Krall, R. Grafl, M. Gschwind, M. Probst
   4
   5         See file COPYRIGHT for information on usage and disclaimer of warranties
   6
   7         Contains the codegenerator for an Alpha processor.
   8         This module generates Alpha machine code for a sequence of
   9         pseudo commands (ICMDs).
  10
  11         Authors: Andreas  Krall      EMAIL: cacao@complang.tuwien.ac.at
  12                  Reinhard Grafl      EMAIL: cacao@complang.tuwien.ac.at
  13
  14         Last Change: $Id: ngen.c 474 2003-10-04 18:55:10Z stefan $
  15
  16 *******************************************************************************/
  17
  18 #include "jitdef.h"   /* phil */
  19
  20 /* *****************************************************************************
  21
  22 Datatypes and Register Allocations:
  23 -----------------------------------
  24
  25 On 64-bit-machines (like the Alpha) all operands are stored in the
  26 registers in a 64-bit form, even when the correspondig JavaVM  operands
  27 only need 32 bits. This is done by a canonical representation:
  28
  29 32-bit integers are allways stored as sign-extended 64-bit values (this
  30 approach is directly supported by the Alpha architecture and is very easy
  31 to implement).
  32
  33 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  34 expanding the exponent and mantissa with zeroes. (also supported by the
  35 architecture)
  36
  37
  38 Stackframes:
  39
  40 The calling conventions and the layout of the stack is  explained in detail
  41 in the documention file: calling.doc
  42
  43 *******************************************************************************/
  44
  45
  46 /* additional functions and macros to generate code ***************************/
  47
  48 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
  49 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
  50
  51
  52 #ifdef STATISTICS
  53 #define COUNT_SPILLS count_spills++
  54 #else
  55 #define COUNT_SPILLS
  56 #endif
  57
  58
  59 /* gen_nullptr_check(objreg) */
  60
  61 #ifdef SOFTNULLPTRCHECK
  62 #define gen_nullptr_check(objreg) \
  63         if (checknull) {\
  64         M_BEQZ((objreg), 0);\
  65         mcode_addxnullrefs(mcodeptr);\
  66         }
  67 #else
  68 #define gen_nullptr_check(objreg)
  69 #endif
  70
  71
  72 /* MCODECHECK(icnt) */
  73
  74 #define MCODECHECK(icnt) \
  75         if((mcodeptr+(icnt))>mcodeend)mcodeptr=mcode_increase((u1*)mcodeptr)
  76
  77 /* M_INTMOVE:
  78      generates an integer-move from register a to b.
  79      if a and b are the same int-register, no code will be generated.
  80 */
  81
  82 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
  83
  84
  85 /* M_FLTMOVE:
  86     generates a floating-point-move from register a to b.
  87     if a and b are the same float-register, no code will be generated
  88 */
  89
  90 #define M_FLTMOVE(a,b) if(a!=b){M_FMOV(a,b);}
  91
  92
  93 /* var_to_reg_xxx:
  94     this function generates code to fetch data from a pseudo-register
  95     into a real register.
  96     If the pseudo-register has actually been assigned to a real
  97     register, no code will be emitted, since following operations
  98     can use this register directly.
  99
 100     v: pseudoregister to be fetched from
 101     tempregnum: temporary register to be used if v is actually spilled to ram
 102
 103     return: the register number, where the operand can be found after
 104             fetching (this wil be either tempregnum or the register
 105             number allready given to v)
 106 */
 107
 108 #define var_to_reg_int(regnr,v,tempnr) { \
 109         if ((v)->flags & INMEMORY) \
 110                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 111         else regnr=(v)->regoff; \
 112 }
 113
 114
 115 #define var_to_reg_flt(regnr,v,tempnr) { \
 116         if ((v)->flags & INMEMORY) \
 117                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 118         else regnr=(v)->regoff; \
 119 }
 120
 121
 122 /* reg_of_var:
 123     This function determines a register, to which the result of an operation
 124     should go, when it is ultimatively intended to store the result in
 125     pseudoregister v.
 126     If v is assigned to an actual register, this register will be returned.
 127     Otherwise (when v is spilled) this function returns tempregnum.
 128     If not already done, regoff and flags are set in the stack location.
 129 */
 130
 131 static int reg_of_var(stackptr v, int tempregnum)
 132 {
 133         varinfo      *var;
 134
 135         switch (v->varkind) {
 136                 case TEMPVAR:
 137                         if (!(v->flags & INMEMORY))
 138                                 return(v->regoff);
 139                         break;
 140                 case STACKVAR:
 141                         var = &(interfaces[v->varnum][v->type]);
 142                         v->regoff = var->regoff;
 143                         if (!(var->flags & INMEMORY))
 144                                 return(var->regoff);
 145                         break;
 146                 case LOCALVAR:
 147                         var = &(locals[v->varnum][v->type]);
 148                         v->regoff = var->regoff;
 149                         if (!(var->flags & INMEMORY))
 150                                 return(var->regoff);
 151                         break;
 152                 case ARGVAR:
 153                         v->regoff = v->varnum;
 154                         if (IS_FLT_DBL_TYPE(v->type)) {
 155                                 if (v->varnum < fltreg_argnum) {
 156                                         v->regoff = argfltregs[v->varnum];
 157                                         return(argfltregs[v->varnum]);
 158                                         }
 159                                 }
 160                         else
 161                                 if (v->varnum < intreg_argnum) {
 162                                         v->regoff = argintregs[v->varnum];
 163                                         return(argintregs[v->varnum]);
 164                                         }
 165                         v->regoff -= intreg_argnum;
 166                         break;
 167                 }
 168         v->flags |= INMEMORY;
 169         return tempregnum;
 170 }
 171
 172
 173 /* store_reg_to_var_xxx:
 174     This function generates the code to store the result of an operation
 175     back into a spilled pseudo-variable.
 176     If the pseudo-variable has not been spilled in the first place, this
 177     function will generate nothing.
 178
 179     v ............ Pseudovariable
 180     tempregnum ... Number of the temporary registers as returned by
 181                    reg_of_var.
 182 */
 183
 184 #define store_reg_to_var_int(sptr, tempregnum) {       \
 185         if ((sptr)->flags & INMEMORY) {                    \
 186                 COUNT_SPILLS;                                  \
 187                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 188                 }                                              \
 189         }
 190
 191 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 192         if ((sptr)->flags & INMEMORY) {                    \
 193                 COUNT_SPILLS;                                  \
 194                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 195                 }                                              \
 196         }
 197
 198
 199 /* NullPointerException handlers and exception handling initialisation        */
 200
 201 typedef struct sigctx_struct {
 202
 203         long          sc_onstack;           /* sigstack state to restore          */
 204         long          sc_mask;              /* signal mask to restore             */
 205         long          sc_pc;                /* pc at time of signal               */
 206         long          sc_ps;                /* psl to retore                      */
 207         long          sc_regs[32];          /* processor regs 0 to 31             */
 208         long          sc_ownedfp;           /* fp has been used                   */
 209         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 210         unsigned long sc_fpcr;              /* floating point control register    */
 211         unsigned long sc_fp_control;        /* software fpcr                      */
 212                                             /* rest is unused                     */
 213         unsigned long sc_reserved1, sc_reserved2;
 214         unsigned long sc_ssize;
 215         char          *sc_sbase;
 216         unsigned long sc_traparg_a0;
 217         unsigned long sc_traparg_a1;
 218         unsigned long sc_traparg_a2;
 219         unsigned long sc_fp_trap_pc;
 220         unsigned long sc_fp_trigger_sum;
 221         unsigned long sc_fp_trigger_inst;
 222         unsigned long sc_retcode[2];
 223 } sigctx_struct;
 224
 225
 226 /* NullPointerException signal handler for hardware null pointer check */
 227
 228 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 229 {
 230         sigset_t nsig;
 231         int      instr;
 232         long     faultaddr;
 233
 234         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 235
 236         instr = *((int*)(sigctx->sc_pc));
 237         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 238
 239         if (faultaddr == 0) {
 240                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 241                 sigemptyset(&nsig);
 242                 sigaddset(&nsig, sig);
 243                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 244                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 245                                             (long) proto_java_lang_NullPointerException;
 246                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 247                 sigctx->sc_pc = (long) asm_handle_exception;
 248                 return;
 249                 }
 250         else {
 251                 faultaddr += (long) ((instr << 16) >> 16);
 252                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 253                 panic("Stack overflow");
 254                 }
 255 }
 256
 257
 258 #ifdef __osf__
 259
 260 void init_exceptions(void)
 261 {
 262
 263 #else /* Linux */
 264
 265 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 266         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 267         Digital Unix this is done automatically.
 268 */
 269
 270 #include <asm/fpu.h>
 271
 272 extern unsigned long ieee_get_fp_control();
 273 extern void ieee_set_fp_control(unsigned long fp_control);
 274
 275 void init_exceptions(void)
 276 {
 277 /* initialize floating point control */
 278
 279 #if 0
 280 ieee_set_fp_control(ieee_get_fp_control()
 281                     & ~IEEE_TRAP_ENABLE_INV
 282                     & ~IEEE_TRAP_ENABLE_DZE
 283 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 284                     & ~IEEE_TRAP_ENABLE_INE
 285                     & ~IEEE_TRAP_ENABLE_DNO
 286                     & ~IEEE_TRAP_ENABLE_OVF);
 287 #endif
 288 #endif
 289
 290         /* install signal handlers we need to convert to exceptions */
 291
 292         if (!checknull) {
 293
 294 #if defined(SIGSEGV)
 295                 signal(SIGSEGV, (void*) catch_NullPointerException);
 296 #endif
 297
 298 #if defined(SIGBUS)
 299                 signal(SIGBUS, (void*) catch_NullPointerException);
 300 #endif
 301                 }
 302 }
 303
 304
 305 void print_float(double d)
 306 {
 307         static int count;
 308         int *i1 = (int*) &d;
 309 //      printf("%d %08x %08x\n", ++count, i1[1], i1[0]);
 310         char buf[30];
 311         sprintf(buf, "%g", d);
 312         printf("%d %s\n", ++count, buf+1);
 313 }
 314
 315 /* function gen_mcode **********************************************************
 316
 317         generates machine code
 318
 319 *******************************************************************************/
 320
 321 #define         MethodPointer   -8
 322 #define         FrameSize       -12
 323 #define     IsSync          -16
 324 #define     IsLeaf          -20
 325 #define     IntSave         -24
 326 #define     FltSave         -28
 327 #define     ExTableSize     -32
 328 #define     ExTableStart    -32
 329
 330 #define     ExEntrySize     -32
 331 #define     ExStartPC       -8
 332 #define     ExEndPC         -16
 333 #define     ExHandlerPC     -24
 334 #define     ExCatchType     -32
 335
 336 void my_bpt();
 337
 338 static void gen_mcode()
 339 {
 340         int  len, s1, s2, s3, d, bbs;
 341         s4   a;
 342         s4          *mcodeptr;
 343         stackptr    src;
 344         varinfo     *var;
 345         basicblock  *bptr;
 346         instruction *iptr;
 347         xtable *ex;
 348
 349         {
 350         int p, pa, t, l, r;
 351         static int mcount;
 352
 353         if (++mcount == 99) {
 354         }
 355
 356         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 357
 358         /* space to save used callee saved registers */
 359
 360         savedregs_num += (savintregcnt - maxsavintreguse);
 361         savedregs_num += (savfltregcnt - maxsavfltreguse);
 362
 363         parentargs_base = maxmemuse + savedregs_num;
 364
 365 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 366
 367         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 368                 parentargs_base++;
 369
 370 #endif
 371
 372         /* create method header */
 373
 374         (void) dseg_addaddress(method);                         /* MethodPointer  */
 375         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 376
 377 #ifdef USE_THREADS
 378
 379         /* IsSync contains the offset relative to the stack pointer for the
 380            argument of monitor_exit used in the exception handler. Since the
 381            offset could be zero and give a wrong meaning of the flag it is
 382            offset by one.
 383         */
 384
 385         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 386                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 387         else
 388
 389 #endif
 390
 391         (void) dseg_adds4(0);                                   /* IsSync         */
 392
 393         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 394         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 395         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 396         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 397
 398         /* create exception table */
 399
 400         for (ex = extable; ex != NULL; ex = ex->down) {
 401
 402 #ifdef LOOP_DEBUG
 403                 if (ex->start != NULL)
 404                         printf("adding start - %d - ", ex->start->debug_nr);
 405                 else {
 406                         printf("PANIC - start is NULL");
 407                         exit(-1);
 408                 }
 409 #endif
 410
 411                 dseg_addtarget(ex->start);
 412
 413 #ifdef LOOP_DEBUG
 414                 if (ex->end != NULL)
 415                         printf("adding end - %d - ", ex->end->debug_nr);
 416                 else {
 417                         printf("PANIC - end is NULL");
 418                         exit(-1);
 419                 }
 420 #endif
 421
 422                 dseg_addtarget(ex->end);
 423
 424 #ifdef LOOP_DEBUG
 425                 if (ex->handler != NULL)
 426                         printf("adding handler - %d\n", ex->handler->debug_nr);
 427                 else {
 428                         printf("PANIC - handler is NULL");
 429                         exit(-1);
 430                 }
 431 #endif
 432
 433                 dseg_addtarget(ex->handler);
 434
 435                 (void) dseg_addaddress(ex->catchtype);
 436                 }
 437
 438         /* initialize mcode variables */
 439
 440         mcodeptr = (s4*) mcodebase;
 441         mcodeend = (s4*) (mcodebase + mcodesize);
 442         MCODECHECK(128 + mparamcount);
 443
 444         /* create stack frame (if necessary) */
 445
 446         if (parentargs_base)
 447                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 448
 449         /* save return address and used callee saved registers */
 450
 451         p = parentargs_base;
 452         if (!isleafmethod)
 453                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 454         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 455                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 456         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 457                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 458
 459         /* save monitorenter argument */
 460
 461 #ifdef USE_THREADS
 462         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 463                 if (method->flags & ACC_STATIC) {
 464                         p = dseg_addaddress (class);
 465                         M_ALD(REG_ITMP1, REG_PV, p);
 466                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 467                         }
 468                 else {
 469                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 470                         }
 471                 }
 472 #endif
 473
 474         /* copy argument registers to stack and call trace function with pointer
 475            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 476         */
 477
 478         if (runverbose) {
 479                 M_LDA (REG_SP, REG_SP, -(14*8));
 480                 M_AST(REG_RA, REG_SP, 1*8);
 481
 482                 M_LST(argintregs[0], REG_SP,  2*8);
 483                 M_LST(argintregs[1], REG_SP,  3*8);
 484                 M_LST(argintregs[2], REG_SP,  4*8);
 485                 M_LST(argintregs[3], REG_SP,  5*8);
 486                 M_LST(argintregs[4], REG_SP,  6*8);
 487                 M_LST(argintregs[5], REG_SP,  7*8);
 488
 489                 M_DST(argfltregs[0], REG_SP,  8*8);
 490                 M_DST(argfltregs[1], REG_SP,  9*8);
 491                 M_DST(argfltregs[2], REG_SP, 10*8);
 492                 M_DST(argfltregs[3], REG_SP, 11*8);
 493                 M_DST(argfltregs[4], REG_SP, 12*8);
 494                 M_DST(argfltregs[5], REG_SP, 13*8);
 495
 496                 p = dseg_addaddress (method);
 497                 M_ALD(REG_ITMP1, REG_PV, p);
 498                 M_AST(REG_ITMP1, REG_SP, 0);
 499                 p = dseg_addaddress ((void*) (builtin_trace_args));
 500                 M_ALD(REG_PV, REG_PV, p);
 501                 M_JSR(REG_RA, REG_PV);
 502                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 503                 M_ALD(REG_RA, REG_SP, 1*8);
 504
 505                 M_LLD(argintregs[0], REG_SP,  2*8);
 506                 M_LLD(argintregs[1], REG_SP,  3*8);
 507                 M_LLD(argintregs[2], REG_SP,  4*8);
 508                 M_LLD(argintregs[3], REG_SP,  5*8);
 509                 M_LLD(argintregs[4], REG_SP,  6*8);
 510                 M_LLD(argintregs[5], REG_SP,  7*8);
 511
 512                 M_DLD(argfltregs[0], REG_SP,  8*8);
 513                 M_DLD(argfltregs[1], REG_SP,  9*8);
 514                 M_DLD(argfltregs[2], REG_SP, 10*8);
 515                 M_DLD(argfltregs[3], REG_SP, 11*8);
 516                 M_DLD(argfltregs[4], REG_SP, 12*8);
 517                 M_DLD(argfltregs[5], REG_SP, 13*8);
 518
 519                 M_LDA (REG_SP, REG_SP, 14*8);
 520                 }
 521
 522         /* take arguments out of register or stack frame */
 523
 524         for (p = 0, l = 0; p < mparamcount; p++) {
 525                 t = mparamtypes[p];
 526                 var = &(locals[l][t]);
 527                 l++;
 528                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 529                         l++;
 530                 if (var->type < 0)
 531                         continue;
 532                 r = var->regoff;
 533                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 534                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 535                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 536                                         {M_INTMOVE (argintregs[p], r);}
 537                                 else                                 /* reg arg -> spilled    */
 538                                         M_LST (argintregs[p], REG_SP, 8 * r);
 539                                 }
 540                         else {                                   /* stack arguments       */
 541                                 pa = p - INT_ARG_CNT;
 542                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 543                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 544                                 else {                               /* stack arg -> spilled  */
 545                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 546                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 547                                         }
 548                                 }
 549                         }
 550                 else {                                       /* floating args         */
 551                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 552                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 553                                         {M_FLTMOVE (argfltregs[p], r);}
 554                                 else                                             /* reg arg -> spilled    */
 555                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 556                                 }
 557                         else {                                   /* stack arguments       */
 558                                 pa = p - FLT_ARG_CNT;
 559                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 560                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 561                                 else {                               /* stack-arg -> spilled  */
 562                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 563                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 564                                         }
 565                                 }
 566                         }
 567                 }  /* end for */
 568
 569         /* call trace function */
 570
 571 #if 0
 572         if (runverbose && !isleafmethod) {
 573                 M_LDA (REG_SP, REG_SP, -8);
 574                 p = dseg_addaddress (method);
 575                 M_ALD(REG_ITMP1, REG_PV, p);
 576                 M_AST(REG_ITMP1, REG_SP, 0);
 577                 p = dseg_addaddress ((void*) (builtin_trace_args));
 578                 M_ALD(REG_PV, REG_PV, p);
 579                 M_JSR(REG_RA, REG_PV);
 580                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 581                 M_LDA(REG_SP, REG_SP, 8);
 582                 }
 583 #endif
 584
 585         /* call monitorenter function */
 586
 587 #ifdef USE_THREADS
 588         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 589                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 590                 M_ALD(REG_PV, REG_PV, p);
 591                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 592                 M_JSR(REG_RA, REG_PV);
 593                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 594                 }
 595 #endif
 596         }
 597
 598         /* end of header generation */
 599
 600         /* walk through all basic blocks */
 601         for (/* bbs = block_count, */ bptr = block; /* --bbs >= 0 */ bptr != NULL; bptr = bptr->next) {
 602
 603                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 604
 605                 if (bptr->flags >= BBREACHED) {
 606
 607                 /* branch resolving */
 608
 609                 {
 610                 branchref *brefs;
 611                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 612                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 613                                           brefs->branchpos, bptr->mpc);
 614                         }
 615                 }
 616
 617                 /* copy interface registers to their destination */
 618
 619                 src = bptr->instack;
 620                 len = bptr->indepth;
 621                 MCODECHECK(64+len);
 622                 while (src != NULL) {
 623                         len--;
 624                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 625                                 d = reg_of_var(src, REG_ITMP1);
 626                                 M_INTMOVE(REG_ITMP1, d);
 627                                 store_reg_to_var_int(src, d);
 628                                 }
 629                         else {
 630                                 d = reg_of_var(src, REG_IFTMP);
 631                                 if ((src->varkind != STACKVAR)) {
 632                                         s2 = src->type;
 633                                         if (IS_FLT_DBL_TYPE(s2)) {
 634                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 635                                                         s1 = interfaces[len][s2].regoff;
 636                                                         M_FLTMOVE(s1,d);
 637                                                         }
 638                                                 else {
 639                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 640                                                         }
 641                                                 store_reg_to_var_flt(src, d);
 642                                                 }
 643                                         else {
 644                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 645                                                         s1 = interfaces[len][s2].regoff;
 646                                                         M_INTMOVE(s1,d);
 647                                                         }
 648                                                 else {
 649                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 650                                                         }
 651                                                 store_reg_to_var_int(src, d);
 652                                                 }
 653                                         }
 654                                 }
 655                         src = src->prev;
 656                         }
 657
 658                 /* walk through all instructions */
 659
 660                 src = bptr->instack;
 661                 len = bptr->icount;
 662                 for (iptr = bptr->iinstr;
 663                     len > 0;
 664                     src = iptr->dst, len--, iptr++) {
 665
 666         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 667         switch (iptr->opc) {
 668
 669                 case ICMD_NOP:        /* ...  ==> ...                                 */
 670                         break;
 671
 672                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 673
 674                         var_to_reg_int(s1, src, REG_ITMP1);
 675                         M_BEQZ(s1, 0);
 676                         mcode_addxnullrefs(mcodeptr);
 677                         break;
 678
 679                 /* constant operations ************************************************/
 680
 681 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 682                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 683
 684 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 685                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 686
 687                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 688                                       /* op1 = 0, val.i = constant                    */
 689
 690                         d = reg_of_var(iptr->dst, REG_ITMP1);
 691                         ICONST(d, iptr->val.i);
 692                         store_reg_to_var_int(iptr->dst, d);
 693                         break;
 694
 695                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 696                                       /* op1 = 0, val.l = constant                    */
 697
 698                         d = reg_of_var(iptr->dst, REG_ITMP1);
 699                         LCONST(d, iptr->val.l);
 700                         store_reg_to_var_int(iptr->dst, d);
 701                         break;
 702
 703                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 704                                       /* op1 = 0, val.f = constant                    */
 705
 706                         d = reg_of_var (iptr->dst, REG_FTMP1);
 707                         a = dseg_addfloat (iptr->val.f);
 708                         M_FLD(d, REG_PV, a);
 709                         store_reg_to_var_flt (iptr->dst, d);
 710                         break;
 711
 712                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 713                                       /* op1 = 0, val.d = constant                    */
 714
 715                         d = reg_of_var (iptr->dst, REG_FTMP1);
 716                         a = dseg_adddouble (iptr->val.d);
 717                         M_DLD(d, REG_PV, a);
 718                         store_reg_to_var_flt (iptr->dst, d);
 719                         break;
 720
 721                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 722                                       /* op1 = 0, val.a = constant                    */
 723
 724                         d = reg_of_var(iptr->dst, REG_ITMP1);
 725                         if (iptr->val.a) {
 726                                 a = dseg_addaddress (iptr->val.a);
 727                                 M_ALD(d, REG_PV, a);
 728                                 }
 729                         else {
 730                                 M_INTMOVE(REG_ZERO, d);
 731                                 }
 732                         store_reg_to_var_int(iptr->dst, d);
 733                         break;
 734
 735
 736                 /* load/store operations **********************************************/
 737
 738                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 739                 case ICMD_LLOAD:      /* op1 = local variable                         */
 740                 case ICMD_ALOAD:
 741
 742                         d = reg_of_var(iptr->dst, REG_ITMP1);
 743                         if ((iptr->dst->varkind == LOCALVAR) &&
 744                             (iptr->dst->varnum == iptr->op1))
 745                                 break;
 746                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 747                         if (var->flags & INMEMORY)
 748                                 M_LLD(d, REG_SP, 8 * var->regoff);
 749                         else
 750                                 {M_INTMOVE(var->regoff,d);}
 751                         store_reg_to_var_int(iptr->dst, d);
 752                         break;
 753
 754                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 755                 case ICMD_DLOAD:      /* op1 = local variable                         */
 756
 757                         d = reg_of_var(iptr->dst, REG_FTMP1);
 758 #if 1
 759                         if ((iptr->dst->varkind == LOCALVAR) &&
 760                             (iptr->dst->varnum == iptr->op1))
 761                                 break;
 762 #endif
 763                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 764                         if (var->flags & INMEMORY)
 765                                 M_DLD(d, REG_SP, 8 * var->regoff);
 766                         else
 767                                 {M_FLTMOVE(var->regoff,d);}
 768                         store_reg_to_var_flt(iptr->dst, d);
 769
 770 #if 0
 771                         M_LDA(REG_SP, REG_SP, -8 * 38);
 772                         M_LST(REG_RA, REG_SP, 0);
 773                         M_LST(1, REG_SP, 8 * 1);
 774                         M_LST(2, REG_SP, 8 * 2);
 775                         M_LST(3, REG_SP, 8 * 3);
 776                         M_LST(4, REG_SP, 8 * 4);
 777                         M_LST(5, REG_SP, 8 * 5);
 778                         M_LST(6, REG_SP, 8 * 6);
 779                         M_LST(7, REG_SP, 8 * 7);
 780                         M_LST(8, REG_SP, 8 * 8);
 781                         M_LST(16, REG_SP, 8 * 9);
 782                         M_LST(17, REG_SP, 8 * 10);
 783                         M_LST(18, REG_SP, 8 * 11);
 784                         M_LST(19, REG_SP, 8 * 12);
 785                         M_LST(20, REG_SP, 8 * 13);
 786                         M_LST(21, REG_SP, 8 * 14);
 787                         M_LST(22, REG_SP, 8 * 15);
 788                         M_LST(23, REG_SP, 8 * 16);
 789                         M_LST(24, REG_SP, 8 * 17);
 790                         M_LST(REG_PV, REG_SP, 8 * 18);
 791
 792                         M_DST(1, REG_SP, 8 * 19);
 793                         M_DST(10, REG_SP, 8 * 20);
 794                         M_DST(11, REG_SP, 8 * 21);
 795                         M_DST(12, REG_SP, 8 * 22);
 796                         M_DST(13, REG_SP, 8 * 23);
 797                         M_DST(14, REG_SP, 8 * 24);
 798                         M_DST(15, REG_SP, 8 * 25);
 799                         M_DST(16, REG_SP, 8 * 26);
 800                         M_DST(17, REG_SP, 8 * 27);
 801                         M_DST(18, REG_SP, 8 * 28);
 802                         M_DST(19, REG_SP, 8 * 29);
 803                         M_DST(20, REG_SP, 8 * 30);
 804                         M_DST(21, REG_SP, 8 * 31);
 805                         M_DST(22, REG_SP, 8 * 32);
 806                         M_DST(23, REG_SP, 8 * 33);
 807                         M_DST(24, REG_SP, 8 * 34);
 808                         M_DST(25, REG_SP, 8 * 35);
 809                         M_DST(26, REG_SP, 8 * 36);
 810                         M_DST(27, REG_SP, 8 * 37);
 811
 812                         M_FLTMOVE(d, 16);
 813                         a = dseg_addaddress (print_float);
 814                         M_ALD(REG_PV, REG_PV, a);
 815                         M_JSR(REG_RA, REG_PV);
 816
 817                         M_LLD(REG_RA, REG_SP, 0);
 818                         M_LLD(1, REG_SP, 8 * 1);
 819                         M_LLD(2, REG_SP, 8 * 2);
 820                         M_LLD(3, REG_SP, 8 * 3);
 821                         M_LLD(4, REG_SP, 8 * 4);
 822                         M_LLD(5, REG_SP, 8 * 5);
 823                         M_LLD(6, REG_SP, 8 * 6);
 824                         M_LLD(7, REG_SP, 8 * 7);
 825                         M_LLD(8, REG_SP, 8 * 8);
 826                         M_LLD(16, REG_SP, 8 * 9);
 827                         M_LLD(17, REG_SP, 8 * 10);
 828                         M_LLD(18, REG_SP, 8 * 11);
 829                         M_LLD(19, REG_SP, 8 * 12);
 830                         M_LLD(20, REG_SP, 8 * 13);
 831                         M_LLD(21, REG_SP, 8 * 14);
 832                         M_LLD(22, REG_SP, 8 * 15);
 833                         M_LLD(23, REG_SP, 8 * 16);
 834                         M_LLD(24, REG_SP, 8 * 17);
 835                         M_LLD(REG_PV, REG_SP, 8 * 18);
 836
 837                         M_DLD(1, REG_SP, 8 * 19);
 838                         M_DLD(10, REG_SP, 8 * 20);
 839                         M_DLD(11, REG_SP, 8 * 21);
 840                         M_DLD(12, REG_SP, 8 * 22);
 841                         M_DLD(13, REG_SP, 8 * 23);
 842                         M_DLD(14, REG_SP, 8 * 24);
 843                         M_DLD(15, REG_SP, 8 * 25);
 844                         M_DLD(16, REG_SP, 8 * 26);
 845                         M_DLD(17, REG_SP, 8 * 27);
 846                         M_DLD(18, REG_SP, 8 * 28);
 847                         M_DLD(19, REG_SP, 8 * 29);
 848                         M_DLD(20, REG_SP, 8 * 30);
 849                         M_DLD(21, REG_SP, 8 * 31);
 850                         M_DLD(22, REG_SP, 8 * 32);
 851                         M_DLD(23, REG_SP, 8 * 33);
 852                         M_DLD(24, REG_SP, 8 * 34);
 853                         M_DLD(25, REG_SP, 8 * 35);
 854                         M_DLD(26, REG_SP, 8 * 36);
 855                         M_DLD(27, REG_SP, 8 * 37);
 856                         M_LDA(REG_SP, REG_SP, 8 * 38);
 857 #endif
 858
 859                         break;
 860
 861
 862                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 863                 case ICMD_LSTORE:     /* op1 = local variable                         */
 864                 case ICMD_ASTORE:
 865
 866                         if ((src->varkind == LOCALVAR) &&
 867                             (src->varnum == iptr->op1))
 868                                 break;
 869                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 870                         if (var->flags & INMEMORY) {
 871                                 var_to_reg_int(s1, src, REG_ITMP1);
 872                                 M_LST(s1, REG_SP, 8 * var->regoff);
 873                                 }
 874                         else {
 875                                 var_to_reg_int(s1, src, var->regoff);
 876                                 M_INTMOVE(s1, var->regoff);
 877                                 }
 878                         break;
 879
 880                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 881                 case ICMD_DSTORE:     /* op1 = local variable                         */
 882
 883                         if ((src->varkind == LOCALVAR) &&
 884                             (src->varnum == iptr->op1))
 885                                 break;
 886                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 887                         if (var->flags & INMEMORY) {
 888                                 var_to_reg_flt(s1, src, REG_FTMP1);
 889                                 M_DST(s1, REG_SP, 8 * var->regoff);
 890                                 }
 891                         else {
 892                                 var_to_reg_flt(s1, src, var->regoff);
 893                                 M_FLTMOVE(s1, var->regoff);
 894                                 }
 895                         break;
 896
 897
 898                 /* pop/dup/swap operations ********************************************/
 899
 900                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 901
 902                 case ICMD_POP:        /* ..., value  ==> ...                          */
 903                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 904                         break;
 905
 906 #define M_COPY(from,to) \
 907                         d = reg_of_var(to, REG_IFTMP); \
 908                         if ((from->regoff != to->regoff) || \
 909                             ((from->flags ^ to->flags) & INMEMORY)) { \
 910                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 911                                         var_to_reg_flt(s1, from, d); \
 912                                         M_FLTMOVE(s1,d); \
 913                                         store_reg_to_var_flt(to, d); \
 914                                         }\
 915                                 else { \
 916                                         var_to_reg_int(s1, from, d); \
 917                                         M_INTMOVE(s1,d); \
 918                                         store_reg_to_var_int(to, d); \
 919                                         }\
 920                                 }
 921
 922                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 923                         M_COPY(src, iptr->dst);
 924                         break;
 925
 926                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 927
 928                         M_COPY(src,       iptr->dst->prev->prev);
 929
 930                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 931
 932                         M_COPY(src,       iptr->dst);
 933                         M_COPY(src->prev, iptr->dst->prev);
 934                         break;
 935
 936                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 937
 938                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 939
 940                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 941
 942                         M_COPY(src,             iptr->dst);
 943                         M_COPY(src->prev,       iptr->dst->prev);
 944                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 945                         M_COPY(src, iptr->dst->prev->prev->prev);
 946                         break;
 947
 948                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 949
 950                         M_COPY(src,                   iptr->dst);
 951                         M_COPY(src->prev,             iptr->dst->prev);
 952                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 953                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 954                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 955                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 956                         break;
 957
 958                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 959
 960                         M_COPY(src, iptr->dst->prev);
 961                         M_COPY(src->prev, iptr->dst);
 962                         break;
 963
 964
 965                 /* integer operations *************************************************/
 966
 967                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 968
 969                         var_to_reg_int(s1, src, REG_ITMP1);
 970                         d = reg_of_var(iptr->dst, REG_ITMP3);
 971                         M_ISUB(REG_ZERO, s1, d);
 972                         store_reg_to_var_int(iptr->dst, d);
 973                         break;
 974
 975                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 976
 977                         var_to_reg_int(s1, src, REG_ITMP1);
 978                         d = reg_of_var(iptr->dst, REG_ITMP3);
 979                         M_LSUB(REG_ZERO, s1, d);
 980                         store_reg_to_var_int(iptr->dst, d);
 981                         break;
 982
 983                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 984
 985                         var_to_reg_int(s1, src, REG_ITMP1);
 986                         d = reg_of_var(iptr->dst, REG_ITMP3);
 987                         M_INTMOVE(s1, d);
 988                         store_reg_to_var_int(iptr->dst, d);
 989                         break;
 990
 991                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 992
 993                         var_to_reg_int(s1, src, REG_ITMP1);
 994                         d = reg_of_var(iptr->dst, REG_ITMP3);
 995                         M_IADD(s1, REG_ZERO, d );
 996                         store_reg_to_var_int(iptr->dst, d);
 997                         break;
 998
 999                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
1000
1001                         var_to_reg_int(s1, src, REG_ITMP1);
1002                         d = reg_of_var(iptr->dst, REG_ITMP3);
1003                         if (has_ext_instr_set) {
1004                                 M_BSEXT(s1, d);
1005                                 }
1006                         else {
1007                                 M_SLL_IMM(s1, 56, d);
1008                                 M_SRA_IMM( d, 56, d);
1009                                 }
1010                         store_reg_to_var_int(iptr->dst, d);
1011                         break;
1012
1013                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
1014
1015                         var_to_reg_int(s1, src, REG_ITMP1);
1016                         d = reg_of_var(iptr->dst, REG_ITMP3);
1017             M_CZEXT(s1, d);
1018                         store_reg_to_var_int(iptr->dst, d);
1019                         break;
1020
1021                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
1022
1023                         var_to_reg_int(s1, src, REG_ITMP1);
1024                         d = reg_of_var(iptr->dst, REG_ITMP3);
1025                         if (has_ext_instr_set) {
1026                                 M_SSEXT(s1, d);
1027                                 }
1028                         else {
1029                                 M_SLL_IMM(s1, 48, d);
1030                                 M_SRA_IMM( d, 48, d);
1031                                 }
1032                         store_reg_to_var_int(iptr->dst, d);
1033                         break;
1034
1035
1036                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1037
1038                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1039                         var_to_reg_int(s2, src, REG_ITMP2);
1040                         d = reg_of_var(iptr->dst, REG_ITMP3);
1041                         M_IADD(s1, s2, d);
1042                         store_reg_to_var_int(iptr->dst, d);
1043                         break;
1044
1045                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
1046                                       /* val.i = constant                             */
1047
1048                         var_to_reg_int(s1, src, REG_ITMP1);
1049                         d = reg_of_var(iptr->dst, REG_ITMP3);
1050                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1051                                 M_IADD_IMM(s1, iptr->val.i, d);
1052                                 }
1053                         else {
1054                                 ICONST(REG_ITMP2, iptr->val.i);
1055                                 M_IADD(s1, REG_ITMP2, d);
1056                                 }
1057                         store_reg_to_var_int(iptr->dst, d);
1058                         break;
1059
1060                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1061
1062                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1063                         var_to_reg_int(s2, src, REG_ITMP2);
1064                         d = reg_of_var(iptr->dst, REG_ITMP3);
1065                         M_LADD(s1, s2, d);
1066                         store_reg_to_var_int(iptr->dst, d);
1067                         break;
1068
1069                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
1070                                       /* val.l = constant                             */
1071
1072                         var_to_reg_int(s1, src, REG_ITMP1);
1073                         d = reg_of_var(iptr->dst, REG_ITMP3);
1074                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1075                                 M_LADD_IMM(s1, iptr->val.l, d);
1076                                 }
1077                         else {
1078                                 LCONST(REG_ITMP2, iptr->val.l);
1079                                 M_LADD(s1, REG_ITMP2, d);
1080                                 }
1081                         store_reg_to_var_int(iptr->dst, d);
1082                         break;
1083
1084                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1085
1086                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1087                         var_to_reg_int(s2, src, REG_ITMP2);
1088                         d = reg_of_var(iptr->dst, REG_ITMP3);
1089                         M_ISUB(s1, s2, d);
1090                         store_reg_to_var_int(iptr->dst, d);
1091                         break;
1092
1093                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
1094                                       /* val.i = constant                             */
1095
1096                         var_to_reg_int(s1, src, REG_ITMP1);
1097                         d = reg_of_var(iptr->dst, REG_ITMP3);
1098                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1099                                 M_ISUB_IMM(s1, iptr->val.i, d);
1100                                 }
1101                         else {
1102                                 ICONST(REG_ITMP2, iptr->val.i);
1103                                 M_ISUB(s1, REG_ITMP2, d);
1104                                 }
1105                         store_reg_to_var_int(iptr->dst, d);
1106                         break;
1107
1108                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1109
1110                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1111                         var_to_reg_int(s2, src, REG_ITMP2);
1112                         d = reg_of_var(iptr->dst, REG_ITMP3);
1113                         M_LSUB(s1, s2, d);
1114                         store_reg_to_var_int(iptr->dst, d);
1115                         break;
1116
1117                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1118                                       /* val.l = constant                             */
1119
1120                         var_to_reg_int(s1, src, REG_ITMP1);
1121                         d = reg_of_var(iptr->dst, REG_ITMP3);
1122                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1123                                 M_LSUB_IMM(s1, iptr->val.l, d);
1124                                 }
1125                         else {
1126                                 LCONST(REG_ITMP2, iptr->val.l);
1127                                 M_LSUB(s1, REG_ITMP2, d);
1128                                 }
1129                         store_reg_to_var_int(iptr->dst, d);
1130                         break;
1131
1132                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1133
1134                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1135                         var_to_reg_int(s2, src, REG_ITMP2);
1136                         d = reg_of_var(iptr->dst, REG_ITMP3);
1137                         M_IMUL(s1, s2, d);
1138                         store_reg_to_var_int(iptr->dst, d);
1139                         break;
1140
1141                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1142                                       /* val.i = constant                             */
1143
1144                         var_to_reg_int(s1, src, REG_ITMP1);
1145                         d = reg_of_var(iptr->dst, REG_ITMP3);
1146                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1147                                 M_IMUL_IMM(s1, iptr->val.i, d);
1148                                 }
1149                         else {
1150                                 ICONST(REG_ITMP2, iptr->val.i);
1151                                 M_IMUL(s1, REG_ITMP2, d);
1152                                 }
1153                         store_reg_to_var_int(iptr->dst, d);
1154                         break;
1155
1156                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1157
1158                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1159                         var_to_reg_int(s2, src, REG_ITMP2);
1160                         d = reg_of_var(iptr->dst, REG_ITMP3);
1161                         M_LMUL (s1, s2, d);
1162                         store_reg_to_var_int(iptr->dst, d);
1163                         break;
1164
1165                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1166                                       /* val.l = constant                             */
1167
1168                         var_to_reg_int(s1, src, REG_ITMP1);
1169                         d = reg_of_var(iptr->dst, REG_ITMP3);
1170                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1171                                 M_LMUL_IMM(s1, iptr->val.l, d);
1172                                 }
1173                         else {
1174                                 LCONST(REG_ITMP2, iptr->val.l);
1175                                 M_LMUL(s1, REG_ITMP2, d);
1176                                 }
1177                         store_reg_to_var_int(iptr->dst, d);
1178                         break;
1179
1180                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1181                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1182
1183                         var_to_reg_int(s1, src, REG_ITMP1);
1184                         d = reg_of_var(iptr->dst, REG_ITMP3);
1185                         if (iptr->val.i <= 15) {
1186                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
1187                                 M_CMOVGE(s1, s1, REG_ITMP2);
1188                                 }
1189                         else {
1190                                 M_SRA_IMM(s1, 63, REG_ITMP2);
1191                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1192                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
1193                                 }
1194                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
1195                         store_reg_to_var_int(iptr->dst, d);
1196                         break;
1197
1198                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1199
1200                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1201                         var_to_reg_int(s2, src, REG_ITMP2);
1202                         d = reg_of_var(iptr->dst, REG_ITMP3);
1203                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1204                         M_SLL(s1, REG_ITMP3, d);
1205                         M_IADD(d, REG_ZERO, d);
1206                         store_reg_to_var_int(iptr->dst, d);
1207                         break;
1208
1209                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1210                                       /* val.i = constant                             */
1211
1212                         var_to_reg_int(s1, src, REG_ITMP1);
1213                         d = reg_of_var(iptr->dst, REG_ITMP3);
1214                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1215                         M_IADD(d, REG_ZERO, d);
1216                         store_reg_to_var_int(iptr->dst, d);
1217                         break;
1218
1219                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1220
1221                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1222                         var_to_reg_int(s2, src, REG_ITMP2);
1223                         d = reg_of_var(iptr->dst, REG_ITMP3);
1224                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1225                         M_SRA(s1, REG_ITMP3, d);
1226                         store_reg_to_var_int(iptr->dst, d);
1227                         break;
1228
1229                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1230                                       /* val.i = constant                             */
1231
1232                         var_to_reg_int(s1, src, REG_ITMP1);
1233                         d = reg_of_var(iptr->dst, REG_ITMP3);
1234                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1235                         store_reg_to_var_int(iptr->dst, d);
1236                         break;
1237
1238                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1239
1240                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1241                         var_to_reg_int(s2, src, REG_ITMP2);
1242                         d = reg_of_var(iptr->dst, REG_ITMP3);
1243                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1244             M_IZEXT(s1, d);
1245                         M_SRL(d, REG_ITMP2, d);
1246                         M_IADD(d, REG_ZERO, d);
1247                         store_reg_to_var_int(iptr->dst, d);
1248                         break;
1249
1250                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1251                                       /* val.i = constant                             */
1252
1253                         var_to_reg_int(s1, src, REG_ITMP1);
1254                         d = reg_of_var(iptr->dst, REG_ITMP3);
1255             M_IZEXT(s1, d);
1256                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1257                         M_IADD(d, REG_ZERO, d);
1258                         store_reg_to_var_int(iptr->dst, d);
1259                         break;
1260
1261                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1262
1263                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1264                         var_to_reg_int(s2, src, REG_ITMP2);
1265                         d = reg_of_var(iptr->dst, REG_ITMP3);
1266                         M_SLL(s1, s2, d);
1267                         store_reg_to_var_int(iptr->dst, d);
1268                         break;
1269
1270                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1271                                       /* val.i = constant                             */
1272
1273                         var_to_reg_int(s1, src, REG_ITMP1);
1274                         d = reg_of_var(iptr->dst, REG_ITMP3);
1275                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1276                         store_reg_to_var_int(iptr->dst, d);
1277                         break;
1278
1279                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1280
1281                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1282                         var_to_reg_int(s2, src, REG_ITMP2);
1283                         d = reg_of_var(iptr->dst, REG_ITMP3);
1284                         M_SRA(s1, s2, d);
1285                         store_reg_to_var_int(iptr->dst, d);
1286                         break;
1287
1288                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1289                                       /* val.i = constant                             */
1290
1291                         var_to_reg_int(s1, src, REG_ITMP1);
1292                         d = reg_of_var(iptr->dst, REG_ITMP3);
1293                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1294                         store_reg_to_var_int(iptr->dst, d);
1295                         break;
1296
1297                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1298
1299                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1300                         var_to_reg_int(s2, src, REG_ITMP2);
1301                         d = reg_of_var(iptr->dst, REG_ITMP3);
1302                         M_SRL(s1, s2, d);
1303                         store_reg_to_var_int(iptr->dst, d);
1304                         break;
1305
1306                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1307                                       /* val.i = constant                             */
1308
1309                         var_to_reg_int(s1, src, REG_ITMP1);
1310                         d = reg_of_var(iptr->dst, REG_ITMP3);
1311                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1312                         store_reg_to_var_int(iptr->dst, d);
1313                         break;
1314
1315                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1316                 case ICMD_LAND:
1317
1318                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1319                         var_to_reg_int(s2, src, REG_ITMP2);
1320                         d = reg_of_var(iptr->dst, REG_ITMP3);
1321                         M_AND(s1, s2, d);
1322                         store_reg_to_var_int(iptr->dst, d);
1323                         break;
1324
1325                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1326                                       /* val.i = constant                             */
1327
1328                         var_to_reg_int(s1, src, REG_ITMP1);
1329                         d = reg_of_var(iptr->dst, REG_ITMP3);
1330                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1331                                 M_AND_IMM(s1, iptr->val.i, d);
1332                                 }
1333                         else if (iptr->val.i == 0xffff) {
1334                                 M_CZEXT(s1, d);
1335                                 }
1336                         else if (iptr->val.i == 0xffffff) {
1337                                 M_ZAPNOT_IMM(s1, 0x07, d);
1338                                 }
1339                         else {
1340                                 ICONST(REG_ITMP2, iptr->val.i);
1341                                 M_AND(s1, REG_ITMP2, d);
1342                                 }
1343                         store_reg_to_var_int(iptr->dst, d);
1344                         break;
1345
1346                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1347                                       /* val.i = constant                             */
1348
1349                         var_to_reg_int(s1, src, REG_ITMP1);
1350                         d = reg_of_var(iptr->dst, REG_ITMP3);
1351                         if (s1 == d) {
1352                                 M_MOV(s1, REG_ITMP1);
1353                                 s1 = REG_ITMP1;
1354                                 }
1355                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1356                                 M_AND_IMM(s1, iptr->val.i, d);
1357                                 M_BGEZ(s1, 3);
1358                                 M_ISUB(REG_ZERO, s1, d);
1359                                 M_AND_IMM(d, iptr->val.i, d);
1360                                 }
1361                         else if (iptr->val.i == 0xffff) {
1362                                 M_CZEXT(s1, d);
1363                                 M_BGEZ(s1, 3);
1364                                 M_ISUB(REG_ZERO, s1, d);
1365                                 M_CZEXT(d, d);
1366                                 }
1367                         else if (iptr->val.i == 0xffffff) {
1368                                 M_ZAPNOT_IMM(s1, 0x07, d);
1369                                 M_BGEZ(s1, 3);
1370                                 M_ISUB(REG_ZERO, s1, d);
1371                                 M_ZAPNOT_IMM(d, 0x07, d);
1372                                 }
1373                         else {
1374                                 ICONST(REG_ITMP2, iptr->val.i);
1375                                 M_AND(s1, REG_ITMP2, d);
1376                                 M_BGEZ(s1, 3);
1377                                 M_ISUB(REG_ZERO, s1, d);
1378                                 M_AND(d, REG_ITMP2, d);
1379                                 }
1380                         M_ISUB(REG_ZERO, d, d);
1381                         store_reg_to_var_int(iptr->dst, d);
1382                         break;
1383
1384                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1385
1386 /*          b = value & 0xffff;
1387                         a = value >> 16;
1388                         a = ((b - a) & 0xffff) + (b < a);
1389 */
1390                         var_to_reg_int(s1, src, REG_ITMP1);
1391                         d = reg_of_var(iptr->dst, REG_ITMP3);
1392                         if (s1 == d) {
1393                                 M_MOV(s1, REG_ITMP3);
1394                                 s1 = REG_ITMP3;
1395                                 }
1396                         M_BLTZ(s1, 7);
1397             M_CZEXT(s1, REG_ITMP2);
1398                         M_SRA_IMM(s1, 16, d);
1399                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1400                         M_ISUB(REG_ITMP2, d, d);
1401             M_CZEXT(d, d);
1402                         M_IADD(d, REG_ITMP1, d);
1403                         M_BR(11 + (s1 == REG_ITMP1));
1404                         M_ISUB(REG_ZERO, s1, REG_ITMP1);
1405             M_CZEXT(REG_ITMP1, REG_ITMP2);
1406                         M_SRA_IMM(REG_ITMP1, 16, d);
1407                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1408                         M_ISUB(REG_ITMP2, d, d);
1409             M_CZEXT(d, d);
1410                         M_IADD(d, REG_ITMP1, d);
1411                         M_ISUB(REG_ZERO, d, d);
1412                         if (s1 == REG_ITMP1) {
1413                                 var_to_reg_int(s1, src, REG_ITMP1);
1414                                 }
1415                         M_SLL_IMM(s1, 33, REG_ITMP2);
1416                         M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2);
1417                         M_ISUB(d, REG_ITMP2, d);
1418                         store_reg_to_var_int(iptr->dst, d);
1419                         break;
1420
1421                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1422                                       /* val.l = constant                             */
1423
1424                         var_to_reg_int(s1, src, REG_ITMP1);
1425                         d = reg_of_var(iptr->dst, REG_ITMP3);
1426                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1427                                 M_AND_IMM(s1, iptr->val.l, d);
1428                                 }
1429                         else if (iptr->val.l == 0xffffL) {
1430                                 M_CZEXT(s1, d);
1431                                 }
1432                         else if (iptr->val.l == 0xffffffL) {
1433                                 M_ZAPNOT_IMM(s1, 0x07, d);
1434                                 }
1435                         else if (iptr->val.l == 0xffffffffL) {
1436                                 M_IZEXT(s1, d);
1437                                 }
1438                         else if (iptr->val.l == 0xffffffffffL) {
1439                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1440                                 }
1441                         else if (iptr->val.l == 0xffffffffffffL) {
1442                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1443                                 }
1444                         else if (iptr->val.l == 0xffffffffffffffL) {
1445                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1446                                 }
1447                         else {
1448                                 LCONST(REG_ITMP2, iptr->val.l);
1449                                 M_AND(s1, REG_ITMP2, d);
1450                                 }
1451                         store_reg_to_var_int(iptr->dst, d);
1452                         break;
1453
1454                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1455                                       /* val.l = constant                             */
1456
1457                         var_to_reg_int(s1, src, REG_ITMP1);
1458                         d = reg_of_var(iptr->dst, REG_ITMP3);
1459                         if (s1 == d) {
1460                                 M_MOV(s1, REG_ITMP1);
1461                                 s1 = REG_ITMP1;
1462                                 }
1463                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1464                                 M_AND_IMM(s1, iptr->val.l, d);
1465                                 M_BGEZ(s1, 3);
1466                                 M_LSUB(REG_ZERO, s1, d);
1467                                 M_AND_IMM(d, iptr->val.l, d);
1468                                 }
1469                         else if (iptr->val.l == 0xffffL) {
1470                                 M_CZEXT(s1, d);
1471                                 M_BGEZ(s1, 3);
1472                                 M_LSUB(REG_ZERO, s1, d);
1473                                 M_CZEXT(d, d);
1474                                 }
1475                         else if (iptr->val.l == 0xffffffL) {
1476                                 M_ZAPNOT_IMM(s1, 0x07, d);
1477                                 M_BGEZ(s1, 3);
1478                                 M_LSUB(REG_ZERO, s1, d);
1479                                 M_ZAPNOT_IMM(d, 0x07, d);
1480                                 }
1481                         else if (iptr->val.l == 0xffffffffL) {
1482                                 M_IZEXT(s1, d);
1483                                 M_BGEZ(s1, 3);
1484                                 M_LSUB(REG_ZERO, s1, d);
1485                                 M_IZEXT(d, d);
1486                                 }
1487                         else if (iptr->val.l == 0xffffffffffL) {
1488                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1489                                 M_BGEZ(s1, 3);
1490                                 M_LSUB(REG_ZERO, s1, d);
1491                                 M_ZAPNOT_IMM(d, 0x1f, d);
1492                                 }
1493                         else if (iptr->val.l == 0xffffffffffffL) {
1494                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1495                                 M_BGEZ(s1, 3);
1496                                 M_LSUB(REG_ZERO, s1, d);
1497                                 M_ZAPNOT_IMM(d, 0x3f, d);
1498                                 }
1499                         else if (iptr->val.l == 0xffffffffffffffL) {
1500                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1501                                 M_BGEZ(s1, 3);
1502                                 M_LSUB(REG_ZERO, s1, d);
1503                                 M_ZAPNOT_IMM(d, 0x7f, d);
1504                                 }
1505                         else {
1506                                 LCONST(REG_ITMP2, iptr->val.l);
1507                                 M_AND(s1, REG_ITMP2, d);
1508                                 M_BGEZ(s1, 3);
1509                                 M_LSUB(REG_ZERO, s1, d);
1510                                 M_AND(d, REG_ITMP2, d);
1511                                 }
1512                         M_LSUB(REG_ZERO, d, d);
1513                         store_reg_to_var_int(iptr->dst, d);
1514                         break;
1515
1516                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1517
1518                         var_to_reg_int(s1, src, REG_ITMP1);
1519                         d = reg_of_var(iptr->dst, REG_ITMP3);
1520                         if (s1 == d) {
1521                                 M_MOV(s1, REG_ITMP3);
1522                                 s1 = REG_ITMP3;
1523                                 }
1524                         M_CZEXT(s1, REG_ITMP2);
1525                         M_SRA_IMM(s1, 16, d);
1526                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1527                         M_LSUB(REG_ITMP2, d, d);
1528             M_CZEXT(d, d);
1529                         M_LADD(d, REG_ITMP1, d);
1530                         M_LDA(REG_ITMP2, REG_ZERO, -1);
1531                         M_SRL_IMM(REG_ITMP2, 33, REG_ITMP2);
1532                         if (s1 == REG_ITMP1) {
1533                                 var_to_reg_int(s1, src, REG_ITMP1);
1534                                 }
1535                         M_CMPULT(s1, REG_ITMP2, REG_ITMP2);
1536                         M_BNEZ(REG_ITMP2, 11);
1537                         M_LDA(d, REG_ZERO, -257);
1538                         M_ZAPNOT_IMM(d, 0xcd, d);
1539                         M_LSUB(REG_ZERO, s1, REG_ITMP2);
1540                         M_CMOVGE(s1, s1, REG_ITMP2);
1541                         M_UMULH(REG_ITMP2, d, REG_ITMP2);
1542                         M_SRL_IMM(REG_ITMP2, 16, REG_ITMP2);
1543                         M_LSUB(REG_ZERO, REG_ITMP2, d);
1544                         M_CMOVGE(s1, REG_ITMP2, d);
1545                         M_SLL_IMM(d, 16, REG_ITMP2);
1546                         M_LADD(d, REG_ITMP2, d);
1547                         M_LSUB(s1, d, d);
1548                         store_reg_to_var_int(iptr->dst, d);
1549                         break;
1550
1551                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1552                 case ICMD_LOR:
1553
1554                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1555                         var_to_reg_int(s2, src, REG_ITMP2);
1556                         d = reg_of_var(iptr->dst, REG_ITMP3);
1557                         M_OR( s1,s2, d);
1558                         store_reg_to_var_int(iptr->dst, d);
1559                         break;
1560
1561                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1562                                       /* val.i = constant                             */
1563
1564                         var_to_reg_int(s1, src, REG_ITMP1);
1565                         d = reg_of_var(iptr->dst, REG_ITMP3);
1566                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1567                                 M_OR_IMM(s1, iptr->val.i, d);
1568                                 }
1569                         else {
1570                                 ICONST(REG_ITMP2, iptr->val.i);
1571                                 M_OR(s1, REG_ITMP2, d);
1572                                 }
1573                         store_reg_to_var_int(iptr->dst, d);
1574                         break;
1575
1576                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1577                                       /* val.l = constant                             */
1578
1579                         var_to_reg_int(s1, src, REG_ITMP1);
1580                         d = reg_of_var(iptr->dst, REG_ITMP3);
1581                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1582                                 M_OR_IMM(s1, iptr->val.l, d);
1583                                 }
1584                         else {
1585                                 LCONST(REG_ITMP2, iptr->val.l);
1586                                 M_OR(s1, REG_ITMP2, d);
1587                                 }
1588                         store_reg_to_var_int(iptr->dst, d);
1589                         break;
1590
1591                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1592                 case ICMD_LXOR:
1593
1594                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1595                         var_to_reg_int(s2, src, REG_ITMP2);
1596                         d = reg_of_var(iptr->dst, REG_ITMP3);
1597                         M_XOR(s1, s2, d);
1598                         store_reg_to_var_int(iptr->dst, d);
1599                         break;
1600
1601                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1602                                       /* val.i = constant                             */
1603
1604                         var_to_reg_int(s1, src, REG_ITMP1);
1605                         d = reg_of_var(iptr->dst, REG_ITMP3);
1606                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1607                                 M_XOR_IMM(s1, iptr->val.i, d);
1608                                 }
1609                         else {
1610                                 ICONST(REG_ITMP2, iptr->val.i);
1611                                 M_XOR(s1, REG_ITMP2, d);
1612                                 }
1613                         store_reg_to_var_int(iptr->dst, d);
1614                         break;
1615
1616                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1617                                       /* val.l = constant                             */
1618
1619                         var_to_reg_int(s1, src, REG_ITMP1);
1620                         d = reg_of_var(iptr->dst, REG_ITMP3);
1621                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1622                                 M_XOR_IMM(s1, iptr->val.l, d);
1623                                 }
1624                         else {
1625                                 LCONST(REG_ITMP2, iptr->val.l);
1626                                 M_XOR(s1, REG_ITMP2, d);
1627                                 }
1628                         store_reg_to_var_int(iptr->dst, d);
1629                         break;
1630
1631
1632                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1633
1634                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1635                         var_to_reg_int(s2, src, REG_ITMP2);
1636                         d = reg_of_var(iptr->dst, REG_ITMP3);
1637                         M_CMPLT(s1, s2, REG_ITMP3);
1638                         M_CMPLT(s2, s1, REG_ITMP1);
1639                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1640                         store_reg_to_var_int(iptr->dst, d);
1641                         break;
1642
1643
1644                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1645                                       /* op1 = variable, val.i = constant             */
1646
1647                         var = &(locals[iptr->op1][TYPE_INT]);
1648                         if (var->flags & INMEMORY) {
1649                                 s1 = REG_ITMP1;
1650                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1651                                 }
1652                         else
1653                                 s1 = var->regoff;
1654                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1655                                 M_IADD_IMM(s1, iptr->val.i, s1);
1656                                 }
1657                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1658                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1659                                 }
1660                         else {
1661                                 M_LDA (s1, s1, iptr->val.i);
1662                                 M_IADD(s1, REG_ZERO, s1);
1663                                 }
1664                         if (var->flags & INMEMORY)
1665                                 M_LST(s1, REG_SP, 8 * var->regoff);
1666                         break;
1667
1668
1669                 /* floating operations ************************************************/
1670
1671                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1672
1673                         var_to_reg_flt(s1, src, REG_FTMP1);
1674                         d = reg_of_var(iptr->dst, REG_FTMP3);
1675                         M_FMOVN(s1, d);
1676                         store_reg_to_var_flt(iptr->dst, d);
1677                         break;
1678
1679                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1680
1681                         var_to_reg_flt(s1, src, REG_FTMP1);
1682                         d = reg_of_var(iptr->dst, REG_FTMP3);
1683                         M_FMOVN(s1, d);
1684                         store_reg_to_var_flt(iptr->dst, d);
1685                         break;
1686
1687                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1688
1689                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1690                         var_to_reg_flt(s2, src, REG_FTMP2);
1691                         d = reg_of_var(iptr->dst, REG_FTMP3);
1692                         if (checkfloats) {
1693                                 M_FADDS(s1, s2, d);
1694                                 M_TRAPB;
1695                                 }
1696                         else {
1697                                 M_FADD(s1, s2, d);
1698                                 }
1699                         store_reg_to_var_flt(iptr->dst, d);
1700                         break;
1701
1702                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1703
1704                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1705                         var_to_reg_flt(s2, src, REG_FTMP2);
1706                         d = reg_of_var(iptr->dst, REG_FTMP3);
1707                         if (checkfloats) {
1708                                 M_DADDS(s1, s2, d);
1709                                 M_TRAPB;
1710                                 }
1711                         else {
1712                                 M_DADD(s1, s2, d);
1713                                 }
1714                         store_reg_to_var_flt(iptr->dst, d);
1715                         break;
1716
1717                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1718
1719                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1720                         var_to_reg_flt(s2, src, REG_FTMP2);
1721                         d = reg_of_var(iptr->dst, REG_FTMP3);
1722                         if (checkfloats) {
1723                                 M_FSUBS(s1, s2, d);
1724                                 M_TRAPB;
1725                                 }
1726                         else {
1727                                 M_FSUB(s1, s2, d);
1728                                 }
1729                         store_reg_to_var_flt(iptr->dst, d);
1730                         break;
1731
1732                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1733
1734                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1735                         var_to_reg_flt(s2, src, REG_FTMP2);
1736                         d = reg_of_var(iptr->dst, REG_FTMP3);
1737                         if (checkfloats) {
1738                                 M_DSUBS(s1, s2, d);
1739                                 M_TRAPB;
1740                                 }
1741                         else {
1742                                 M_DSUB(s1, s2, d);
1743                                 }
1744                         store_reg_to_var_flt(iptr->dst, d);
1745                         break;
1746
1747                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1748
1749                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1750                         var_to_reg_flt(s2, src, REG_FTMP2);
1751                         d = reg_of_var(iptr->dst, REG_FTMP3);
1752                         if (checkfloats) {
1753                                 M_FMULS(s1, s2, d);
1754                                 M_TRAPB;
1755                                 }
1756                         else {
1757                                 M_FMUL(s1, s2, d);
1758                                 }
1759                         store_reg_to_var_flt(iptr->dst, d);
1760                         break;
1761
1762                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1763
1764                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1765                         var_to_reg_flt(s2, src, REG_FTMP2);
1766                         d = reg_of_var(iptr->dst, REG_FTMP3);
1767                         if (checkfloats) {
1768                                 M_DMULS(s1, s2, d);
1769                                 M_TRAPB;
1770                                 }
1771                         else {
1772                                 M_DMUL(s1, s2, d);
1773                                 }
1774                         store_reg_to_var_flt(iptr->dst, d);
1775                         break;
1776
1777                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1778
1779                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1780                         var_to_reg_flt(s2, src, REG_FTMP2);
1781                         d = reg_of_var(iptr->dst, REG_FTMP3);
1782                         if (checkfloats) {
1783                                 M_FDIVS(s1, s2, d);
1784                                 M_TRAPB;
1785                                 }
1786                         else {
1787                                 M_FDIV(s1, s2, d);
1788                                 }
1789                         store_reg_to_var_flt(iptr->dst, d);
1790                         break;
1791
1792                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1793
1794                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1795                         var_to_reg_flt(s2, src, REG_FTMP2);
1796                         d = reg_of_var(iptr->dst, REG_FTMP3);
1797                         if (checkfloats) {
1798                                 M_DDIVS(s1, s2, d);
1799                                 M_TRAPB;
1800                                 }
1801                         else {
1802                                 M_DDIV(s1, s2, d);
1803                                 }
1804                         store_reg_to_var_flt(iptr->dst, d);
1805                         break;
1806
1807                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1808
1809                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1810                         var_to_reg_flt(s2, src, REG_FTMP2);
1811                         d = reg_of_var(iptr->dst, REG_FTMP3);
1812                         if (checkfloats) {
1813                                 M_FDIVS(s1,s2, REG_FTMP3);
1814                                 M_TRAPB;
1815                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1816                                 M_TRAPB;
1817                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1818                                 M_FMULS(REG_FTMP3, s2, REG_FTMP3);
1819                                 M_TRAPB;
1820                                 M_FSUBS(s1, REG_FTMP3, d);
1821                                 M_TRAPB;
1822                                 }
1823                         else {
1824                                 M_FDIV(s1,s2, REG_FTMP3);
1825                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1826                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1827                                 M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1828                                 M_FSUB(s1, REG_FTMP3, d);
1829                                 }
1830                         store_reg_to_var_flt(iptr->dst, d);
1831                     break;
1832
1833                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1834
1835                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1836                         var_to_reg_flt(s2, src, REG_FTMP2);
1837                         d = reg_of_var(iptr->dst, REG_FTMP3);
1838                         if (checkfloats) {
1839                                 M_DDIVS(s1,s2, REG_FTMP3);
1840                                 M_TRAPB;
1841                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1842                                 M_TRAPB;
1843                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1844                                 M_DMULS(REG_FTMP3, s2, REG_FTMP3);
1845                                 M_TRAPB;
1846                                 M_DSUBS(s1, REG_FTMP3, d);
1847                                 M_TRAPB;
1848                                 }
1849                         else {
1850                                 M_DDIV(s1,s2, REG_FTMP3);
1851                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1852                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1853                                 M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1854                                 M_DSUB(s1, REG_FTMP3, d);
1855                                 }
1856                         store_reg_to_var_flt(iptr->dst, d);
1857                     break;
1858
1859                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1860                 case ICMD_L2F:
1861                         var_to_reg_int(s1, src, REG_ITMP1);
1862                         d = reg_of_var(iptr->dst, REG_FTMP3);
1863                         a = dseg_adddouble(0.0);
1864                         M_LST (s1, REG_PV, a);
1865                         M_DLD (d, REG_PV, a);
1866                         M_CVTLF(d, d);
1867                         store_reg_to_var_flt(iptr->dst, d);
1868                         break;
1869
1870                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1871                 case ICMD_L2D:
1872                         var_to_reg_int(s1, src, REG_ITMP1);
1873                         d = reg_of_var(iptr->dst, REG_FTMP3);
1874                         a = dseg_adddouble(0.0);
1875                         M_LST (s1, REG_PV, a);
1876                         M_DLD (d, REG_PV, a);
1877                         M_CVTLD(d, d);
1878                         store_reg_to_var_flt(iptr->dst, d);
1879                         break;
1880
1881                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1882                 case ICMD_D2I:
1883                         var_to_reg_flt(s1, src, REG_FTMP1);
1884                         d = reg_of_var(iptr->dst, REG_ITMP3);
1885                         a = dseg_adddouble(0.0);
1886                         if (checkfloats) {
1887                                 M_CVTDL_CS(s1, REG_FTMP1);
1888                                 M_TRAPB;
1889                                 M_CVTLIS(REG_FTMP1, REG_FTMP2);
1890                                 M_TRAPB;
1891                                 }
1892                         else {
1893                                 M_CVTDL_C(s1, REG_FTMP1);
1894                                 M_CVTLI(REG_FTMP1, REG_FTMP2);
1895                                 }
1896                         M_DST (REG_FTMP1, REG_PV, a);
1897                         M_ILD (d, REG_PV, a);
1898                         store_reg_to_var_int(iptr->dst, d);
1899                         break;
1900
1901                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1902                 case ICMD_D2L:
1903                         var_to_reg_flt(s1, src, REG_FTMP1);
1904                         d = reg_of_var(iptr->dst, REG_ITMP3);
1905                         a = dseg_adddouble(0.0);
1906                         if (checkfloats) {
1907                                 M_CVTDL_CS(s1, REG_FTMP1);
1908                                 M_TRAPB;
1909                                 }
1910                         else {
1911                                 M_CVTDL_C(s1, REG_FTMP1);
1912                                 }
1913                         M_DST (REG_FTMP1, REG_PV, a);
1914                         M_LLD (d, REG_PV, a);
1915                         store_reg_to_var_int(iptr->dst, d);
1916                         break;
1917
1918                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1919
1920                         var_to_reg_flt(s1, src, REG_FTMP1);
1921                         d = reg_of_var(iptr->dst, REG_FTMP3);
1922                         M_FLTMOVE(s1, d);
1923                         store_reg_to_var_flt(iptr->dst, d);
1924                         break;
1925
1926                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1927
1928                         var_to_reg_flt(s1, src, REG_FTMP1);
1929                         d = reg_of_var(iptr->dst, REG_FTMP3);
1930                         if (checkfloats) {
1931                                 M_CVTDFS(s1, d);
1932                                 M_TRAPB;
1933                                 }
1934                         else {
1935                                 M_CVTDF(s1, d);
1936                                 }
1937                         store_reg_to_var_flt(iptr->dst, d);
1938                         break;
1939
1940                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1941                 case ICMD_DCMPL:
1942                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1943                         var_to_reg_flt(s2, src, REG_FTMP2);
1944                         d = reg_of_var(iptr->dst, REG_ITMP3);
1945                         if (checkfloats) {
1946                                 M_LSUB_IMM(REG_ZERO, 1, d);
1947                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1948                                 M_TRAPB;
1949                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1950                                 M_CLR   (d);
1951                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1952                                 M_TRAPB;
1953                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1954                                 M_LADD_IMM(REG_ZERO, 1, d);
1955                                 }
1956                         else {
1957                                 M_LSUB_IMM(REG_ZERO, 1, d);
1958                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1959                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1960                                 M_CLR   (d);
1961                                 M_FCMPLT(s2, s1, REG_FTMP3);
1962                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1963                                 M_LADD_IMM(REG_ZERO, 1, d);
1964                                 }
1965                         store_reg_to_var_int(iptr->dst, d);
1966                         break;
1967
1968                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1969                 case ICMD_DCMPG:
1970                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1971                         var_to_reg_flt(s2, src, REG_FTMP2);
1972                         d = reg_of_var(iptr->dst, REG_ITMP3);
1973                         if (checkfloats) {
1974                                 M_LADD_IMM(REG_ZERO, 1, d);
1975                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1976                                 M_TRAPB;
1977                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1978                                 M_CLR   (d);
1979                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1980                                 M_TRAPB;
1981                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1982                                 M_LSUB_IMM(REG_ZERO, 1, d);
1983                                 }
1984                         else {
1985                                 M_LADD_IMM(REG_ZERO, 1, d);
1986                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1987                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1988                                 M_CLR   (d);
1989                                 M_FCMPLT(s1, s2, REG_FTMP3);
1990                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1991                                 M_LSUB_IMM(REG_ZERO, 1, d);
1992                                 }
1993                         store_reg_to_var_int(iptr->dst, d);
1994                         break;
1995
1996
1997                 /* memory operations **************************************************/
1998
1999                         /* #define gen_bound_check \
2000                         if (checkbounds) {\
2001                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
2002                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
2003                                 M_BEQZ(REG_ITMP3, 0);\
2004                                 mcode_addxboundrefs(mcodeptr);\
2005                                 }
2006                         */
2007
2008 #define gen_bound_check \
2009             if (checkbounds) { \
2010                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
2011                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
2012                                 M_BEQZ(REG_ITMP3, 0);\
2013                                 mcode_addxboundrefs(mcodeptr); \
2014                 }
2015
2016                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
2017
2018                         var_to_reg_int(s1, src, REG_ITMP1);
2019                         d = reg_of_var(iptr->dst, REG_ITMP3);
2020                         gen_nullptr_check(s1);
2021                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
2022                         store_reg_to_var_int(iptr->dst, d);
2023                         break;
2024
2025                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
2026
2027                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2028                         var_to_reg_int(s2, src, REG_ITMP2);
2029                         d = reg_of_var(iptr->dst, REG_ITMP3);
2030                         if (iptr->op1 == 0) {
2031                                 gen_nullptr_check(s1);
2032                                 gen_bound_check;
2033                                 }
2034                         M_SAADDQ(s2, s1, REG_ITMP1);
2035                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2036                         store_reg_to_var_int(iptr->dst, d);
2037                         break;
2038
2039                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
2040
2041                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2042                         var_to_reg_int(s2, src, REG_ITMP2);
2043                         d = reg_of_var(iptr->dst, REG_ITMP3);
2044                         if (iptr->op1 == 0) {
2045                                 gen_nullptr_check(s1);
2046                                 gen_bound_check;
2047                                 }
2048                         M_S8ADDQ(s2, s1, REG_ITMP1);
2049                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
2050                         store_reg_to_var_int(iptr->dst, d);
2051                         break;
2052
2053                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
2054
2055                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2056                         var_to_reg_int(s2, src, REG_ITMP2);
2057                         d = reg_of_var(iptr->dst, REG_ITMP3);
2058                         if (iptr->op1 == 0) {
2059                                 gen_nullptr_check(s1);
2060                                 gen_bound_check;
2061                                 }
2062
2063                         M_S4ADDQ(s2, s1, REG_ITMP1);
2064                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
2065                         store_reg_to_var_int(iptr->dst, d);
2066                         break;
2067
2068                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
2069
2070                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2071                         var_to_reg_int(s2, src, REG_ITMP2);
2072                         d = reg_of_var(iptr->dst, REG_FTMP3);
2073                         if (iptr->op1 == 0) {
2074                                 gen_nullptr_check(s1);
2075                                 gen_bound_check;
2076                                 }
2077                         M_S4ADDQ(s2, s1, REG_ITMP1);
2078                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2079                         store_reg_to_var_flt(iptr->dst, d);
2080                         break;
2081
2082                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
2083
2084                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2085                         var_to_reg_int(s2, src, REG_ITMP2);
2086                         d = reg_of_var(iptr->dst, REG_FTMP3);
2087                         if (iptr->op1 == 0) {
2088                                 gen_nullptr_check(s1);
2089                                 gen_bound_check;
2090                                 }
2091                         M_S8ADDQ(s2, s1, REG_ITMP1);
2092                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2093                         store_reg_to_var_flt(iptr->dst, d);
2094                         break;
2095
2096                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
2097
2098                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2099                         var_to_reg_int(s2, src, REG_ITMP2);
2100                         d = reg_of_var(iptr->dst, REG_ITMP3);
2101                         if (iptr->op1 == 0) {
2102                                 gen_nullptr_check(s1);
2103                                 gen_bound_check;
2104                                 }
2105                         if (has_ext_instr_set) {
2106                                 M_LADD(s2, s1, REG_ITMP1);
2107                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2108                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2109                                 }
2110                         else {
2111                                 M_LADD (s2, s1, REG_ITMP1);
2112                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2113                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2114                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2115                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
2116                                 }
2117                         store_reg_to_var_int(iptr->dst, d);
2118                         break;
2119
2120                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
2121
2122                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2123                         var_to_reg_int(s2, src, REG_ITMP2);
2124                         d = reg_of_var(iptr->dst, REG_ITMP3);
2125                         if (iptr->op1 == 0) {
2126                                 gen_nullptr_check(s1);
2127                                 gen_bound_check;
2128                                 }
2129                         if (has_ext_instr_set) {
2130                                 M_LADD(s2, s1, REG_ITMP1);
2131                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2132                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
2133                                 M_SSEXT(d, d);
2134                                 }
2135                         else {
2136                                 M_LADD(s2, s1, REG_ITMP1);
2137                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2138                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2139                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
2140                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2141                                 M_SRA_IMM(d, 48, d);
2142                                 }
2143                         store_reg_to_var_int(iptr->dst, d);
2144                         break;
2145
2146                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
2147
2148                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2149                         var_to_reg_int(s2, src, REG_ITMP2);
2150                         d = reg_of_var(iptr->dst, REG_ITMP3);
2151                         if (iptr->op1 == 0) {
2152                                 gen_nullptr_check(s1);
2153                                 gen_bound_check;
2154                                 }
2155                         if (has_ext_instr_set) {
2156                                 M_LADD   (s2, s1, REG_ITMP1);
2157                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
2158                                 M_BSEXT  (d, d);
2159                                 }
2160                         else {
2161                                 M_LADD(s2, s1, REG_ITMP1);
2162                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2163                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
2164                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2165                                 M_SRA_IMM(d, 56, d);
2166                                 }
2167                         store_reg_to_var_int(iptr->dst, d);
2168                         break;
2169
2170
2171                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2172
2173                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2174                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2175                         if (iptr->op1 == 0) {
2176                                 gen_nullptr_check(s1);
2177                                 gen_bound_check;
2178                                 }
2179                         var_to_reg_int(s3, src, REG_ITMP3);
2180                         M_SAADDQ(s2, s1, REG_ITMP1);
2181                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2182                         break;
2183
2184                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2185
2186                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2187                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2188                         if (iptr->op1 == 0) {
2189                                 gen_nullptr_check(s1);
2190                                 gen_bound_check;
2191                                 }
2192                         var_to_reg_int(s3, src, REG_ITMP3);
2193                         M_S8ADDQ(s2, s1, REG_ITMP1);
2194                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2195                         break;
2196
2197                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2198
2199                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2200                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2201                         if (iptr->op1 == 0) {
2202                                 gen_nullptr_check(s1);
2203                                 gen_bound_check;
2204                                 }
2205
2206                         var_to_reg_int(s3, src, REG_ITMP3);
2207                         M_S4ADDQ(s2, s1, REG_ITMP1);
2208                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2209                         break;
2210
2211                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2212
2213                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2214                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2215                         if (iptr->op1 == 0) {
2216                                 gen_nullptr_check(s1);
2217                                 gen_bound_check;
2218                                 }
2219                         var_to_reg_flt(s3, src, REG_FTMP3);
2220                         M_S4ADDQ(s2, s1, REG_ITMP1);
2221                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2222                         break;
2223
2224                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2225
2226                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2227                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2228                         if (iptr->op1 == 0) {
2229                                 gen_nullptr_check(s1);
2230                                 gen_bound_check;
2231                                 }
2232                         var_to_reg_flt(s3, src, REG_FTMP3);
2233                         M_S8ADDQ(s2, s1, REG_ITMP1);
2234                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2235                         break;
2236
2237                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2238
2239                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2240                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2241                         if (iptr->op1 == 0) {
2242                                 gen_nullptr_check(s1);
2243                                 gen_bound_check;
2244                                 }
2245                         var_to_reg_int(s3, src, REG_ITMP3);
2246                         if (has_ext_instr_set) {
2247                                 M_LADD(s2, s1, REG_ITMP1);
2248                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2249                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2250                                 }
2251                         else {
2252                                 M_LADD (s2, s1, REG_ITMP1);
2253                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2254                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2255                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2256                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2257                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2258                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2259                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2260                                 }
2261                         break;
2262
2263                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2264
2265                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2266                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2267                         if (iptr->op1 == 0) {
2268                                 gen_nullptr_check(s1);
2269                                 gen_bound_check;
2270                                 }
2271                         var_to_reg_int(s3, src, REG_ITMP3);
2272                         if (has_ext_instr_set) {
2273                                 M_LADD(s2, s1, REG_ITMP1);
2274                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2275                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2276                                 }
2277                         else {
2278                                 M_LADD (s2, s1, REG_ITMP1);
2279                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2280                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2281                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2282                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2283                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2284                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2285                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2286                                 }
2287                         break;
2288
2289                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2290
2291                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2292                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2293                         if (iptr->op1 == 0) {
2294                                 gen_nullptr_check(s1);
2295                                 gen_bound_check;
2296                                 }
2297                         var_to_reg_int(s3, src, REG_ITMP3);
2298                         if (has_ext_instr_set) {
2299                                 M_LADD(s2, s1, REG_ITMP1);
2300                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2301                                 }
2302                         else {
2303                                 M_LADD (s2, s1, REG_ITMP1);
2304                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2305                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2306                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2307                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2308                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2309                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2310                                 }
2311                         break;
2312
2313
2314                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2315                                       /* op1 = type, val.a = field address            */
2316
2317                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2318                         M_ALD(REG_ITMP1, REG_PV, a);
2319                         switch (iptr->op1) {
2320                                 case TYPE_INT:
2321                                         var_to_reg_int(s2, src, REG_ITMP2);
2322                                         M_IST(s2, REG_ITMP1, 0);
2323                                         break;
2324                                 case TYPE_LNG:
2325                                         var_to_reg_int(s2, src, REG_ITMP2);
2326                                         M_LST(s2, REG_ITMP1, 0);
2327                                         break;
2328                                 case TYPE_ADR:
2329                                         var_to_reg_int(s2, src, REG_ITMP2);
2330                                         M_AST(s2, REG_ITMP1, 0);
2331                                         break;
2332                                 case TYPE_FLT:
2333                                         var_to_reg_flt(s2, src, REG_FTMP2);
2334                                         M_FST(s2, REG_ITMP1, 0);
2335                                         break;
2336                                 case TYPE_DBL:
2337                                         var_to_reg_flt(s2, src, REG_FTMP2);
2338                                         M_DST(s2, REG_ITMP1, 0);
2339                                         break;
2340                                 default: panic ("internal error");
2341                                 }
2342                         break;
2343
2344                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2345                                       /* op1 = type, val.a = field address            */
2346
2347                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2348                         M_ALD(REG_ITMP1, REG_PV, a);
2349                         switch (iptr->op1) {
2350                                 case TYPE_INT:
2351                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2352                                         M_ILD(d, REG_ITMP1, 0);
2353                                         store_reg_to_var_int(iptr->dst, d);
2354                                         break;
2355                                 case TYPE_LNG:
2356                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2357                                         M_LLD(d, REG_ITMP1, 0);
2358                                         store_reg_to_var_int(iptr->dst, d);
2359                                         break;
2360                                 case TYPE_ADR:
2361                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2362                                         M_ALD(d, REG_ITMP1, 0);
2363                                         store_reg_to_var_int(iptr->dst, d);
2364                                         break;
2365                                 case TYPE_FLT:
2366                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2367                                         M_FLD(d, REG_ITMP1, 0);
2368                                         store_reg_to_var_flt(iptr->dst, d);
2369                                         break;
2370                                 case TYPE_DBL:
2371                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2372                                         M_DLD(d, REG_ITMP1, 0);
2373                                         store_reg_to_var_flt(iptr->dst, d);
2374                                         break;
2375                                 default: panic ("internal error");
2376                                 }
2377                         break;
2378
2379
2380                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2381                                       /* op1 = type, val.i = field offset             */
2382
2383                         a = ((fieldinfo *)(iptr->val.a))->offset;
2384                         switch (iptr->op1) {
2385                                 case TYPE_INT:
2386                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2387                                         var_to_reg_int(s2, src, REG_ITMP2);
2388                                         gen_nullptr_check(s1);
2389                                         M_IST(s2, s1, a);
2390                                         break;
2391                                 case TYPE_LNG:
2392                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2393                                         var_to_reg_int(s2, src, REG_ITMP2);
2394                                         gen_nullptr_check(s1);
2395                                         M_LST(s2, s1, a);
2396                                         break;
2397                                 case TYPE_ADR:
2398                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2399                                         var_to_reg_int(s2, src, REG_ITMP2);
2400                                         gen_nullptr_check(s1);
2401                                         M_AST(s2, s1, a);
2402                                         break;
2403                                 case TYPE_FLT:
2404                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2405                                         var_to_reg_flt(s2, src, REG_FTMP2);
2406                                         gen_nullptr_check(s1);
2407                                         M_FST(s2, s1, a);
2408                                         break;
2409                                 case TYPE_DBL:
2410                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2411                                         var_to_reg_flt(s2, src, REG_FTMP2);
2412                                         gen_nullptr_check(s1);
2413                                         M_DST(s2, s1, a);
2414                                         break;
2415                                 default: panic ("internal error");
2416                                 }
2417                         break;
2418
2419                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2420                                       /* op1 = type, val.i = field offset             */
2421
2422                         a = ((fieldinfo *)(iptr->val.a))->offset;
2423                         switch (iptr->op1) {
2424                                 case TYPE_INT:
2425                                         var_to_reg_int(s1, src, REG_ITMP1);
2426                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2427                                         gen_nullptr_check(s1);
2428                                         M_ILD(d, s1, a);
2429                                         store_reg_to_var_int(iptr->dst, d);
2430                                         break;
2431                                 case TYPE_LNG:
2432                                         var_to_reg_int(s1, src, REG_ITMP1);
2433                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2434                                         gen_nullptr_check(s1);
2435                                         M_LLD(d, s1, a);
2436                                         store_reg_to_var_int(iptr->dst, d);
2437                                         break;
2438                                 case TYPE_ADR:
2439                                         var_to_reg_int(s1, src, REG_ITMP1);
2440                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2441                                         gen_nullptr_check(s1);
2442                                         M_ALD(d, s1, a);
2443                                         store_reg_to_var_int(iptr->dst, d);
2444                                         break;
2445                                 case TYPE_FLT:
2446                                         var_to_reg_int(s1, src, REG_ITMP1);
2447                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2448                                         gen_nullptr_check(s1);
2449                                         M_FLD(d, s1, a);
2450                                         store_reg_to_var_flt(iptr->dst, d);
2451                                         break;
2452                                 case TYPE_DBL:
2453                                         var_to_reg_int(s1, src, REG_ITMP1);
2454                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2455                                         gen_nullptr_check(s1);
2456                                         M_DLD(d, s1, a);
2457                                         store_reg_to_var_flt(iptr->dst, d);
2458                                         break;
2459                                 default: panic ("internal error");
2460                                 }
2461                         break;
2462
2463
2464                 /* branch operations **************************************************/
2465
2466 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2467
2468                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2469
2470                         var_to_reg_int(s1, src, REG_ITMP1);
2471                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2472                         a = dseg_addaddress(asm_handle_exception);
2473                         M_ALD(REG_ITMP2, REG_PV, a);
2474                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2475                         M_NOP;              /* nop ensures that XPC is less than the end */
2476                                             /* of basic block                            */
2477                         ALIGNCODENOP;
2478                         break;
2479
2480                 case ICMD_GOTO:         /* ... ==> ...                                */
2481                                         /* op1 = target JavaVM pc                     */
2482                         M_BR(0);
2483                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2484                         ALIGNCODENOP;
2485                         break;
2486
2487                 case ICMD_JSR:          /* ... ==> ...                                */
2488                                         /* op1 = target JavaVM pc                     */
2489
2490                         M_BSR(REG_ITMP1, 0);
2491                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2492                         break;
2493
2494                 case ICMD_RET:          /* ... ==> ...                                */
2495                                         /* op1 = local variable                       */
2496
2497                         var = &(locals[iptr->op1][TYPE_ADR]);
2498                         if (var->flags & INMEMORY) {
2499                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2500                                 M_RET(REG_ZERO, REG_ITMP1);
2501                                 }
2502                         else
2503                                 M_RET(REG_ZERO, var->regoff);
2504                         ALIGNCODENOP;
2505                         break;
2506
2507                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2508                                         /* op1 = target JavaVM pc                     */
2509
2510                         var_to_reg_int(s1, src, REG_ITMP1);
2511                         M_BEQZ(s1, 0);
2512                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2513                         break;
2514
2515                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2516                                         /* op1 = target JavaVM pc                     */
2517
2518                         var_to_reg_int(s1, src, REG_ITMP1);
2519                         M_BNEZ(s1, 0);
2520                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2521                         break;
2522
2523                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2524                                         /* op1 = target JavaVM pc, val.i = constant   */
2525
2526                         var_to_reg_int(s1, src, REG_ITMP1);
2527                         if (iptr->val.i == 0) {
2528                                 M_BEQZ(s1, 0);
2529                                 }
2530                         else {
2531                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2532                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2533                                         }
2534                                 else {
2535                                         ICONST(REG_ITMP2, iptr->val.i);
2536                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2537                                         }
2538                                 M_BNEZ(REG_ITMP1, 0);
2539                                 }
2540                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2541                         break;
2542
2543                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2544                                         /* op1 = target JavaVM pc, val.i = constant   */
2545
2546                         var_to_reg_int(s1, src, REG_ITMP1);
2547                         if (iptr->val.i == 0) {
2548                                 M_BLTZ(s1, 0);
2549                                 }
2550                         else {
2551                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2552                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2553                                         }
2554                                 else {
2555                                         ICONST(REG_ITMP2, iptr->val.i);
2556                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2557                                         }
2558                                 M_BNEZ(REG_ITMP1, 0);
2559                                 }
2560                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2561                         break;
2562
2563                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2564                                         /* op1 = target JavaVM pc, val.i = constant   */
2565
2566                         var_to_reg_int(s1, src, REG_ITMP1);
2567                         if (iptr->val.i == 0) {
2568                                 M_BLEZ(s1, 0);
2569                                 }
2570                         else {
2571                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2572                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2573                                         }
2574                                 else {
2575                                         ICONST(REG_ITMP2, iptr->val.i);
2576                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2577                                         }
2578                                 M_BNEZ(REG_ITMP1, 0);
2579                                 }
2580                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2581                         break;
2582
2583                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2584                                         /* op1 = target JavaVM pc, val.i = constant   */
2585
2586                         var_to_reg_int(s1, src, REG_ITMP1);
2587                         if (iptr->val.i == 0) {
2588                                 M_BNEZ(s1, 0);
2589                                 }
2590                         else {
2591                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2592                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2593                                         }
2594                                 else {
2595                                         ICONST(REG_ITMP2, iptr->val.i);
2596                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2597                                         }
2598                                 M_BEQZ(REG_ITMP1, 0);
2599                                 }
2600                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2601                         break;
2602
2603                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2604                                         /* op1 = target JavaVM pc, val.i = constant   */
2605
2606                         var_to_reg_int(s1, src, REG_ITMP1);
2607                         if (iptr->val.i == 0) {
2608                                 M_BGTZ(s1, 0);
2609                                 }
2610                         else {
2611                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2612                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2613                                         }
2614                                 else {
2615                                         ICONST(REG_ITMP2, iptr->val.i);
2616                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2617                                         }
2618                                 M_BEQZ(REG_ITMP1, 0);
2619                                 }
2620                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2621                         break;
2622
2623                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2624                                         /* op1 = target JavaVM pc, val.i = constant   */
2625
2626                         var_to_reg_int(s1, src, REG_ITMP1);
2627                         if (iptr->val.i == 0) {
2628                                 M_BGEZ(s1, 0);
2629                                 }
2630                         else {
2631                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2632                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2633                                         }
2634                                 else {
2635                                         ICONST(REG_ITMP2, iptr->val.i);
2636                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2637                                         }
2638                                 M_BEQZ(REG_ITMP1, 0);
2639                                 }
2640                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2641                         break;
2642
2643                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2644                                         /* op1 = target JavaVM pc, val.l = constant   */
2645
2646                         var_to_reg_int(s1, src, REG_ITMP1);
2647                         if (iptr->val.l == 0) {
2648                                 M_BEQZ(s1, 0);
2649                                 }
2650                         else {
2651                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2652                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2653                                         }
2654                                 else {
2655                                         LCONST(REG_ITMP2, iptr->val.l);
2656                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2657                                         }
2658                                 M_BNEZ(REG_ITMP1, 0);
2659                                 }
2660                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2661                         break;
2662
2663                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2664                                         /* op1 = target JavaVM pc, val.l = constant   */
2665
2666                         var_to_reg_int(s1, src, REG_ITMP1);
2667                         if (iptr->val.l == 0) {
2668                                 M_BLTZ(s1, 0);
2669                                 }
2670                         else {
2671                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2672                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2673                                         }
2674                                 else {
2675                                         LCONST(REG_ITMP2, iptr->val.l);
2676                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2677                                         }
2678                                 M_BNEZ(REG_ITMP1, 0);
2679                                 }
2680                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2681                         break;
2682
2683                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2684                                         /* op1 = target JavaVM pc, val.l = constant   */
2685
2686                         var_to_reg_int(s1, src, REG_ITMP1);
2687                         if (iptr->val.l == 0) {
2688                                 M_BLEZ(s1, 0);
2689                                 }
2690                         else {
2691                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2692                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2693                                         }
2694                                 else {
2695                                         LCONST(REG_ITMP2, iptr->val.l);
2696                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2697                                         }
2698                                 M_BNEZ(REG_ITMP1, 0);
2699                                 }
2700                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2701                         break;
2702
2703                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2704                                         /* op1 = target JavaVM pc, val.l = constant   */
2705
2706                         var_to_reg_int(s1, src, REG_ITMP1);
2707                         if (iptr->val.l == 0) {
2708                                 M_BNEZ(s1, 0);
2709                                 }
2710                         else {
2711                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2712                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2713                                         }
2714                                 else {
2715                                         LCONST(REG_ITMP2, iptr->val.l);
2716                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2717                                         }
2718                                 M_BEQZ(REG_ITMP1, 0);
2719                                 }
2720                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2721                         break;
2722
2723                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2724                                         /* op1 = target JavaVM pc, val.l = constant   */
2725
2726                         var_to_reg_int(s1, src, REG_ITMP1);
2727                         if (iptr->val.l == 0) {
2728                                 M_BGTZ(s1, 0);
2729                                 }
2730                         else {
2731                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2732                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2733                                         }
2734                                 else {
2735                                         LCONST(REG_ITMP2, iptr->val.l);
2736                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2737                                         }
2738                                 M_BEQZ(REG_ITMP1, 0);
2739                                 }
2740                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2741                         break;
2742
2743                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2744                                         /* op1 = target JavaVM pc, val.l = constant   */
2745
2746                         var_to_reg_int(s1, src, REG_ITMP1);
2747                         if (iptr->val.l == 0) {
2748                                 M_BGEZ(s1, 0);
2749                                 }
2750                         else {
2751                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2752                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2753                                         }
2754                                 else {
2755                                         LCONST(REG_ITMP2, iptr->val.l);
2756                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2757                                         }
2758                                 M_BEQZ(REG_ITMP1, 0);
2759                                 }
2760                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2761                         break;
2762
2763                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2764                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2765                 case ICMD_IF_ACMPEQ:
2766
2767                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2768                         var_to_reg_int(s2, src, REG_ITMP2);
2769                         M_CMPEQ(s1, s2, REG_ITMP1);
2770                         M_BNEZ(REG_ITMP1, 0);
2771                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2772                         break;
2773
2774                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2775                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2776                 case ICMD_IF_ACMPNE:
2777
2778                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2779                         var_to_reg_int(s2, src, REG_ITMP2);
2780                         M_CMPEQ(s1, s2, REG_ITMP1);
2781                         M_BEQZ(REG_ITMP1, 0);
2782                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2783                         break;
2784
2785                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2786                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2787
2788                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2789                         var_to_reg_int(s2, src, REG_ITMP2);
2790                         M_CMPLT(s1, s2, REG_ITMP1);
2791                         M_BNEZ(REG_ITMP1, 0);
2792                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2793                         break;
2794
2795                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2796                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2797
2798                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2799                         var_to_reg_int(s2, src, REG_ITMP2);
2800                         M_CMPLE(s1, s2, REG_ITMP1);
2801                         M_BEQZ(REG_ITMP1, 0);
2802                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2803                         break;
2804
2805                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2806                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2807
2808                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2809                         var_to_reg_int(s2, src, REG_ITMP2);
2810                         M_CMPLE(s1, s2, REG_ITMP1);
2811                         M_BNEZ(REG_ITMP1, 0);
2812                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2813                         break;
2814
2815                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2816                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2817
2818                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2819                         var_to_reg_int(s2, src, REG_ITMP2);
2820                         M_CMPLT(s1, s2, REG_ITMP1);
2821                         M_BEQZ(REG_ITMP1, 0);
2822                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2823                         break;
2824
2825                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2826
2827                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2828                         break;
2829
2830                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2831                                         /* val.i = constant                           */
2832
2833                         var_to_reg_int(s1, src, REG_ITMP1);
2834                         d = reg_of_var(iptr->dst, REG_ITMP3);
2835                         s3 = iptr->val.i;
2836                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2837                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2838                                         M_CMPEQ(s1, REG_ZERO, d);
2839                                         store_reg_to_var_int(iptr->dst, d);
2840                                         break;
2841                                         }
2842                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2843                                         M_CMPEQ(s1, REG_ZERO, d);
2844                                         M_XOR_IMM(d, 1, d);
2845                                         store_reg_to_var_int(iptr->dst, d);
2846                                         break;
2847                                         }
2848                                 if (s1 == d) {
2849                                         M_MOV(s1, REG_ITMP1);
2850                                         s1 = REG_ITMP1;
2851                                         }
2852                                 ICONST(d, iptr[1].val.i);
2853                                 }
2854                         if ((s3 >= 0) && (s3 <= 255)) {
2855                                 M_CMOVEQ_IMM(s1, s3, d);
2856                                 }
2857                         else {
2858                                 ICONST(REG_ITMP2, s3);
2859                                 M_CMOVEQ(s1, REG_ITMP2, d);
2860                                 }
2861                         store_reg_to_var_int(iptr->dst, d);
2862                         break;
2863
2864                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2865                                         /* val.i = constant                           */
2866
2867                         var_to_reg_int(s1, src, REG_ITMP1);
2868                         d = reg_of_var(iptr->dst, REG_ITMP3);
2869                         s3 = iptr->val.i;
2870                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2871                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2872                                         M_CMPEQ(s1, REG_ZERO, d);
2873                                         store_reg_to_var_int(iptr->dst, d);
2874                                         break;
2875                                         }
2876                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2877                                         M_CMPEQ(s1, REG_ZERO, d);
2878                                         M_XOR_IMM(d, 1, d);
2879                                         store_reg_to_var_int(iptr->dst, d);
2880                                         break;
2881                                         }
2882                                 if (s1 == d) {
2883                                         M_MOV(s1, REG_ITMP1);
2884                                         s1 = REG_ITMP1;
2885                                         }
2886                                 ICONST(d, iptr[1].val.i);
2887                                 }
2888                         if ((s3 >= 0) && (s3 <= 255)) {
2889                                 M_CMOVNE_IMM(s1, s3, d);
2890                                 }
2891                         else {
2892                                 ICONST(REG_ITMP2, s3);
2893                                 M_CMOVNE(s1, REG_ITMP2, d);
2894                                 }
2895                         store_reg_to_var_int(iptr->dst, d);
2896                         break;
2897
2898                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2899                                         /* val.i = constant                           */
2900
2901                         var_to_reg_int(s1, src, REG_ITMP1);
2902                         d = reg_of_var(iptr->dst, REG_ITMP3);
2903                         s3 = iptr->val.i;
2904                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2905                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2906                                         M_CMPLT(s1, REG_ZERO, d);
2907                                         store_reg_to_var_int(iptr->dst, d);
2908                                         break;
2909                                         }
2910                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2911                                         M_CMPLE(REG_ZERO, s1, d);
2912                                         store_reg_to_var_int(iptr->dst, d);
2913                                         break;
2914                                         }
2915                                 if (s1 == d) {
2916                                         M_MOV(s1, REG_ITMP1);
2917                                         s1 = REG_ITMP1;
2918                                         }
2919                                 ICONST(d, iptr[1].val.i);
2920                                 }
2921                         if ((s3 >= 0) && (s3 <= 255)) {
2922                                 M_CMOVLT_IMM(s1, s3, d);
2923                                 }
2924                         else {
2925                                 ICONST(REG_ITMP2, s3);
2926                                 M_CMOVLT(s1, REG_ITMP2, d);
2927                                 }
2928                         store_reg_to_var_int(iptr->dst, d);
2929                         break;
2930
2931                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2932                                         /* val.i = constant                           */
2933
2934                         var_to_reg_int(s1, src, REG_ITMP1);
2935                         d = reg_of_var(iptr->dst, REG_ITMP3);
2936                         s3 = iptr->val.i;
2937                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2938                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2939                                         M_CMPLE(REG_ZERO, s1, d);
2940                                         store_reg_to_var_int(iptr->dst, d);
2941                                         break;
2942                                         }
2943                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2944                                         M_CMPLT(s1, REG_ZERO, d);
2945                                         store_reg_to_var_int(iptr->dst, d);
2946                                         break;
2947                                         }
2948                                 if (s1 == d) {
2949                                         M_MOV(s1, REG_ITMP1);
2950                                         s1 = REG_ITMP1;
2951                                         }
2952                                 ICONST(d, iptr[1].val.i);
2953                                 }
2954                         if ((s3 >= 0) && (s3 <= 255)) {
2955                                 M_CMOVGE_IMM(s1, s3, d);
2956                                 }
2957                         else {
2958                                 ICONST(REG_ITMP2, s3);
2959                                 M_CMOVGE(s1, REG_ITMP2, d);
2960                                 }
2961                         store_reg_to_var_int(iptr->dst, d);
2962                         break;
2963
2964                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2965                                         /* val.i = constant                           */
2966
2967                         var_to_reg_int(s1, src, REG_ITMP1);
2968                         d = reg_of_var(iptr->dst, REG_ITMP3);
2969                         s3 = iptr->val.i;
2970                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2971                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2972                                         M_CMPLT(REG_ZERO, s1, d);
2973                                         store_reg_to_var_int(iptr->dst, d);
2974                                         break;
2975                                         }
2976                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2977                                         M_CMPLE(s1, REG_ZERO, d);
2978                                         store_reg_to_var_int(iptr->dst, d);
2979                                         break;
2980                                         }
2981                                 if (s1 == d) {
2982                                         M_MOV(s1, REG_ITMP1);
2983                                         s1 = REG_ITMP1;
2984                                         }
2985                                 ICONST(d, iptr[1].val.i);
2986                                 }
2987                         if ((s3 >= 0) && (s3 <= 255)) {
2988                                 M_CMOVGT_IMM(s1, s3, d);
2989                                 }
2990                         else {
2991                                 ICONST(REG_ITMP2, s3);
2992                                 M_CMOVGT(s1, REG_ITMP2, d);
2993                                 }
2994                         store_reg_to_var_int(iptr->dst, d);
2995                         break;
2996
2997                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2998                                         /* val.i = constant                           */
2999
3000                         var_to_reg_int(s1, src, REG_ITMP1);
3001                         d = reg_of_var(iptr->dst, REG_ITMP3);
3002                         s3 = iptr->val.i;
3003                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
3004                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
3005                                         M_CMPLE(s1, REG_ZERO, d);
3006                                         store_reg_to_var_int(iptr->dst, d);
3007                                         break;
3008                                         }
3009                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
3010                                         M_CMPLT(REG_ZERO, s1, d);
3011                                         store_reg_to_var_int(iptr->dst, d);
3012                                         break;
3013                                         }
3014                                 if (s1 == d) {
3015                                         M_MOV(s1, REG_ITMP1);
3016                                         s1 = REG_ITMP1;
3017                                         }
3018                                 ICONST(d, iptr[1].val.i);
3019                                 }
3020                         if ((s3 >= 0) && (s3 <= 255)) {
3021                                 M_CMOVLE_IMM(s1, s3, d);
3022                                 }
3023                         else {
3024                                 ICONST(REG_ITMP2, s3);
3025                                 M_CMOVLE(s1, REG_ITMP2, d);
3026                                 }
3027                         store_reg_to_var_int(iptr->dst, d);
3028                         break;
3029
3030
3031                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
3032                 case ICMD_LRETURN:
3033                 case ICMD_ARETURN:
3034
3035 #ifdef USE_THREADS
3036                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3037                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3038                                 M_ALD(REG_PV, REG_PV, a);
3039                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3040                                 M_JSR(REG_RA, REG_PV);
3041                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
3042                                 }
3043 #endif
3044                         var_to_reg_int(s1, src, REG_RESULT);
3045                         M_INTMOVE(s1, REG_RESULT);
3046                         goto nowperformreturn;
3047
3048                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
3049                 case ICMD_DRETURN:
3050
3051 #ifdef USE_THREADS
3052                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3053                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3054                                 M_ALD(REG_PV, REG_PV, a);
3055                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3056                                 M_JSR(REG_RA, REG_PV);
3057                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
3058                                 }
3059 #endif
3060                         var_to_reg_flt(s1, src, REG_FRESULT);
3061                         M_FLTMOVE(s1, REG_FRESULT);
3062                         goto nowperformreturn;
3063
3064                 case ICMD_RETURN:      /* ...  ==> ...                                */
3065
3066 #ifdef USE_THREADS
3067                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3068                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3069                                 M_ALD(REG_PV, REG_PV, a);
3070                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3071                                 M_JSR(REG_RA, REG_PV);
3072                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
3073                                 }
3074 #endif
3075
3076 nowperformreturn:
3077                         {
3078                         int r, p;
3079
3080                         p = parentargs_base;
3081
3082                         /* restore return address                                         */
3083
3084                         if (!isleafmethod)
3085                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
3086
3087                         /* restore saved registers                                        */
3088
3089                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
3090                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
3091                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
3092                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
3093
3094                         /* deallocate stack                                               */
3095
3096                         if (parentargs_base)
3097                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
3098
3099                         /* call trace function */
3100
3101                         if (runverbose) {
3102                                 M_LDA (REG_SP, REG_SP, -24);
3103                                 M_AST(REG_RA, REG_SP, 0);
3104                                 M_LST(REG_RESULT, REG_SP, 8);
3105                                 M_DST(REG_FRESULT, REG_SP,16);
3106                                 a = dseg_addaddress (method);
3107                                 M_ALD(argintregs[0], REG_PV, a);
3108                                 M_MOV(REG_RESULT, argintregs[1]);
3109                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
3110                                 M_FLTMOVE(REG_FRESULT, argfltregs[3]);
3111                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
3112                                 M_ALD(REG_PV, REG_PV, a);
3113                                 M_JSR (REG_RA, REG_PV);
3114                                 s1 = (int)((u1*) mcodeptr - mcodebase);
3115                                 if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3116                                 else {
3117                                         s4 ml=-s1, mh=0;
3118                                         while (ml<-32768) { ml+=65536; mh--; }
3119                                         M_LDA (REG_PV, REG_RA, ml );
3120                                         M_LDAH (REG_PV, REG_PV, mh );
3121                                         }
3122                                 M_DLD(REG_FRESULT, REG_SP,16);
3123                                 M_LLD(REG_RESULT, REG_SP, 8);
3124                                 M_ALD(REG_RA, REG_SP, 0);
3125                                 M_LDA (REG_SP, REG_SP, 24);
3126                                 }
3127
3128                         M_RET(REG_ZERO, REG_RA);
3129                         ALIGNCODENOP;
3130                         }
3131                         break;
3132
3133
3134                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3135                         {
3136                         s4 i, l, *s4ptr;
3137                         void **tptr;
3138
3139                         tptr = (void **) iptr->target;
3140
3141                         s4ptr = iptr->val.a;
3142                         l = s4ptr[1];                          /* low     */
3143                         i = s4ptr[2];                          /* high    */
3144
3145                         var_to_reg_int(s1, src, REG_ITMP1);
3146                         if (l == 0)
3147                                 {M_INTMOVE(s1, REG_ITMP1);}
3148                         else if (l <= 32768) {
3149                                 M_LDA(REG_ITMP1, s1, -l);
3150                                 }
3151                         else {
3152                                 ICONST(REG_ITMP2, l);
3153                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3154                                 }
3155                         i = i - l + 1;
3156
3157                         /* range check */
3158
3159                         if (i <= 256)
3160                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3161                         else {
3162                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3163                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3164                                 }
3165                         M_BEQZ(REG_ITMP2, 0);
3166
3167
3168                         /* mcode_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3169                         mcode_addreference((basicblock *) tptr[0], mcodeptr);
3170
3171                         /* build jump table top down and use address of lowest entry */
3172
3173                         /* s4ptr += 3 + i; */
3174                         tptr += i;
3175
3176                         while (--i >= 0) {
3177                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3178                                 dseg_addtarget((basicblock *) tptr[0]);
3179                                 --tptr;
3180                                 }
3181                         }
3182
3183                         /* length of dataseg after last dseg_addtarget is used by load */
3184
3185                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3186                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3187                         M_JMP(REG_ZERO, REG_ITMP2);
3188                         ALIGNCODENOP;
3189                         break;
3190
3191
3192                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3193                         {
3194                         s4 i, l, val, *s4ptr;
3195                         void **tptr;
3196
3197                         tptr = (void **) iptr->target;
3198
3199                         s4ptr = iptr->val.a;
3200                         l = s4ptr[0];                          /* default  */
3201                         i = s4ptr[1];                          /* count    */
3202
3203                         MCODECHECK((i<<2)+8);
3204                         var_to_reg_int(s1, src, REG_ITMP1);
3205                         while (--i >= 0) {
3206                                 s4ptr += 2;
3207                                 ++tptr;
3208
3209                                 val = s4ptr[0];
3210                                 if ((val >= 0) && (val <= 255)) {
3211                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3212                                         }
3213                                 else {
3214                                         if ((val >= -32768) && (val <= 32767)) {
3215                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3216                                                 }
3217                                         else {
3218                                                 a = dseg_adds4 (val);
3219                                                 M_ILD(REG_ITMP2, REG_PV, a);
3220                                                 }
3221                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3222                                         }
3223                                 M_BNEZ(REG_ITMP2, 0);
3224                                 /* mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3225                                 mcode_addreference((basicblock *) tptr[0], mcodeptr);
3226                                 }
3227
3228                         M_BR(0);
3229                         /* mcode_addreference(BlockPtrOfPC(l), mcodeptr); */
3230
3231                         tptr = (void **) iptr->target;
3232                         mcode_addreference((basicblock *) tptr[0], mcodeptr);
3233
3234                         ALIGNCODENOP;
3235                         break;
3236                         }
3237
3238
3239                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3240                                         /* op1 = return type, val.a = function pointer*/
3241                         s3 = 3;
3242                         goto gen_method;
3243
3244                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3245                                         /* op1 = return type, val.a = function pointer*/
3246                         s3 = 2;
3247                         goto gen_method;
3248
3249                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3250                                         /* op1 = return type, val.a = function pointer*/
3251                         s3 = 1;
3252                         goto gen_method;
3253
3254                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3255                                         /* op1 = arg count, val.a = method pointer    */
3256
3257                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3258                                         /* op1 = arg count, val.a = method pointer    */
3259
3260                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3261                                         /* op1 = arg count, val.a = method pointer    */
3262
3263                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3264                                         /* op1 = arg count, val.a = method pointer    */
3265
3266                         s3 = iptr->op1;
3267
3268 gen_method: {
3269                         methodinfo   *m;
3270                         classinfo    *ci;
3271
3272                         MCODECHECK((s3 << 1) + 64);
3273
3274                         /* copy arguments to registers or stack location                  */
3275
3276                         for (; --s3 >= 0; src = src->prev) {
3277                                 if (src->varkind == ARGVAR)
3278                                         continue;
3279                                 if (IS_INT_LNG_TYPE(src->type)) {
3280                                         if (s3 < INT_ARG_CNT) {
3281                                                 s1 = argintregs[s3];
3282                                                 var_to_reg_int(d, src, s1);
3283                                                 M_INTMOVE(d, s1);
3284                                                 }
3285                                         else  {
3286                                                 var_to_reg_int(d, src, REG_ITMP1);
3287                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3288                                                 }
3289                                         }
3290                                 else
3291                                         if (s3 < FLT_ARG_CNT) {
3292                                                 s1 = argfltregs[s3];
3293                                                 var_to_reg_flt(d, src, s1);
3294                                                 M_FLTMOVE(d, s1);
3295                                                 }
3296                                         else {
3297                                                 var_to_reg_flt(d, src, REG_FTMP1);
3298                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3299                                                 }
3300                                 } /* end of for */
3301
3302                         m = iptr->val.a;
3303                         switch (iptr->opc) {
3304                                 case ICMD_BUILTIN3:
3305                                 case ICMD_BUILTIN2:
3306                                 case ICMD_BUILTIN1:
3307                                         a = dseg_addaddress ((void*) (m));
3308
3309                                         M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3310                                         d = iptr->op1;
3311                                         goto makeactualcall;
3312
3313                                 case ICMD_INVOKESTATIC:
3314                                 case ICMD_INVOKESPECIAL:
3315                                         a = dseg_addaddress (m->stubroutine);
3316
3317                                         M_ALD(REG_PV, REG_PV, a );       /* method pointer in r27 */
3318
3319                                         d = m->returntype;
3320                                         goto makeactualcall;
3321
3322                                 case ICMD_INVOKEVIRTUAL:
3323
3324                                         gen_nullptr_check(argintregs[0]);
3325                                         M_ALD(REG_METHODPTR, argintregs[0],
3326                                                                  OFFSET(java_objectheader, vftbl));
3327                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3328                                                                 sizeof(methodptr) * m->vftblindex);
3329
3330                                         d = m->returntype;
3331                                         goto makeactualcall;
3332
3333                                 case ICMD_INVOKEINTERFACE:
3334                                         ci = m->class;
3335
3336                                         gen_nullptr_check(argintregs[0]);
3337                                         M_ALD(REG_METHODPTR, argintregs[0],
3338                                                                  OFFSET(java_objectheader, vftbl));
3339                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3340                                               OFFSET(vftbl, interfacetable[0]) -
3341                                               sizeof(methodptr*) * ci->index);
3342                                         M_ALD(REG_PV, REG_METHODPTR,
3343                                                             sizeof(methodptr) * (m - ci->methods));
3344
3345                                         d = m->returntype;
3346                                         goto makeactualcall;
3347
3348                                 default:
3349                                         d = 0;
3350                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
3351                                         error ();
3352                                 }
3353
3354 makeactualcall:
3355
3356                         M_JSR (REG_RA, REG_PV);
3357
3358                         /* recompute pv */
3359
3360                         s1 = (int)((u1*) mcodeptr - mcodebase);
3361                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3362                         else {
3363                                 s4 ml=-s1, mh=0;
3364                                 while (ml<-32768) { ml+=65536; mh--; }
3365                                 M_LDA (REG_PV, REG_RA, ml );
3366                                 M_LDAH (REG_PV, REG_PV, mh );
3367                                 }
3368
3369                         /* d contains return type */
3370
3371                         if (d != TYPE_VOID) {
3372                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3373                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3374                                         M_INTMOVE(REG_RESULT, s1);
3375                                         store_reg_to_var_int(iptr->dst, s1);
3376                                         }
3377                                 else {
3378                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3379                                         M_FLTMOVE(REG_FRESULT, s1);
3380                                         store_reg_to_var_flt(iptr->dst, s1);
3381                                         }
3382                                 }
3383                         }
3384                         break;
3385
3386
3387                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3388
3389                                       /* op1:   0 == array, 1 == class                */
3390                                       /* val.a: (classinfo*) superclass               */
3391
3392 /*          superclass is an interface:
3393  *
3394  *          return (sub != NULL) &&
3395  *                 (sub->vftbl->interfacetablelength > super->index) &&
3396  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3397  *
3398  *          superclass is a class:
3399  *
3400  *          return ((sub != NULL) && (0
3401  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3402  *                  super->vftbl->diffvall));
3403  */
3404
3405                         {
3406                         classinfo *super = (classinfo*) iptr->val.a;
3407
3408                         var_to_reg_int(s1, src, REG_ITMP1);
3409                         d = reg_of_var(iptr->dst, REG_ITMP3);
3410                         if (s1 == d) {
3411                                 M_MOV(s1, REG_ITMP1);
3412                                 s1 = REG_ITMP1;
3413                                 }
3414                         M_CLR(d);
3415                         if (iptr->op1) {                               /* class/interface */
3416                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3417                                         M_BEQZ(s1, 6);
3418                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3419                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3420                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3421                                         M_BLEZ(REG_ITMP2, 2);
3422                                         M_ALD(REG_ITMP1, REG_ITMP1,
3423                                               OFFSET(vftbl, interfacetable[0]) -
3424                                               super->index * sizeof(methodptr*));
3425                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3426                                         }
3427                                 else {                                     /* class           */
3428 /*
3429                                         s2 = super->vftbl->diffval;
3430                                         M_BEQZ(s1, 4 + (s2 > 255));
3431                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3432                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3433                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3434                                         if (s2 <= 255)
3435                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3436                                         else {
3437                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3438                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3439                                                 }
3440 */
3441                                         M_BEQZ(s1, 7);
3442                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3443                                         a = dseg_addaddress ((void*) super->vftbl);
3444                                         M_ALD(REG_ITMP2, REG_PV, a);
3445                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3446                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3447                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3448                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3449                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3450                                         }
3451                                 }
3452                         else
3453                                 panic ("internal error: no inlined array instanceof");
3454                         }
3455                         store_reg_to_var_int(iptr->dst, d);
3456                         break;
3457
3458                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3459
3460                                       /* op1:   0 == array, 1 == class                */
3461                                       /* val.a: (classinfo*) superclass               */
3462
3463 /*          superclass is an interface:
3464  *
3465  *          OK if ((sub == NULL) ||
3466  *                 (sub->vftbl->interfacetablelength > super->index) &&
3467  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3468  *
3469  *          superclass is a class:
3470  *
3471  *          OK if ((sub == NULL) || (0
3472  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3473  *                 super->vftbl->diffvall));
3474  */
3475
3476                         {
3477                         classinfo *super = (classinfo*) iptr->val.a;
3478
3479                         d = reg_of_var(iptr->dst, REG_ITMP3);
3480                         var_to_reg_int(s1, src, d);
3481                         if (iptr->op1) {                               /* class/interface */
3482                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3483                                         M_BEQZ(s1, 6);
3484                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3485                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3486                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3487                                         M_BLEZ(REG_ITMP2, 0);
3488                                         mcode_addxcastrefs(mcodeptr);
3489                                         M_ALD(REG_ITMP2, REG_ITMP1,
3490                                               OFFSET(vftbl, interfacetable[0]) -
3491                                               super->index * sizeof(methodptr*));
3492                                         M_BEQZ(REG_ITMP2, 0);
3493                                         mcode_addxcastrefs(mcodeptr);
3494                                         }
3495                                 else {                                     /* class           */
3496 /*
3497                                         s2 = super->vftbl->diffval;
3498                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3499                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3500                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3501                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3502                                         if (s2 == 0) {
3503                                                 M_BNEZ(REG_ITMP1, 0);
3504                                                 }
3505                                         else if (s2 <= 255) {
3506                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3507                                                 M_BEQZ(REG_ITMP2, 0);
3508                                                 }
3509                                         else {
3510                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3511                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3512                                                 M_BEQZ(REG_ITMP2, 0);
3513                                                 }
3514 */
3515                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3516                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3517                                         a = dseg_addaddress ((void*) super->vftbl);
3518                                         M_ALD(REG_ITMP2, REG_PV, a);
3519                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3520                                         if (d != REG_ITMP3) {
3521                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3522                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3523                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3524                                                 }
3525                                         else {
3526                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3527                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3528                                                 M_ALD(REG_ITMP2, REG_PV, a);
3529                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3530                                                 }
3531                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3532                                         M_BEQZ(REG_ITMP2, 0);
3533                                         mcode_addxcastrefs(mcodeptr);
3534                                         }
3535                                 }
3536                         else
3537                                 panic ("internal error: no inlined array checkcast");
3538                         }
3539                         M_INTMOVE(s1, d);
3540                         store_reg_to_var_int(iptr->dst, d);
3541                         break;
3542
3543                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3544
3545                         var_to_reg_int(s1, src, REG_ITMP1);
3546                         M_BLTZ(s1, 0);
3547                         mcode_addxcheckarefs(mcodeptr);
3548                         break;
3549
3550                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3551                                       /* op1 = dimension, val.a = array descriptor    */
3552
3553                         /* check for negative sizes and copy sizes to stack if necessary  */
3554
3555                         MCODECHECK((iptr->op1 << 1) + 64);
3556
3557                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3558                                 var_to_reg_int(s2, src, REG_ITMP1);
3559                                 M_BLTZ(s2, 0);
3560                                 mcode_addxcheckarefs(mcodeptr);
3561
3562                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3563
3564                                 if (src->varkind != ARGVAR) {
3565                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3566                                         }
3567                                 }
3568
3569                         /* a0 = dimension count */
3570
3571                         ICONST(argintregs[0], iptr->op1);
3572
3573                         /* a1 = arraydescriptor */
3574
3575                         a = dseg_addaddress(iptr->val.a);
3576                         M_ALD(argintregs[1], REG_PV, a);
3577
3578                         /* a2 = pointer to dimensions = stack pointer */
3579
3580                         M_INTMOVE(REG_SP, argintregs[2]);
3581
3582                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3583                         M_ALD(REG_PV, REG_PV, a);
3584                         M_JSR(REG_RA, REG_PV);
3585                         s1 = (int)((u1*) mcodeptr - mcodebase);
3586                         if (s1 <= 32768)
3587                                 M_LDA (REG_PV, REG_RA, -s1);
3588                         else {
3589                                 s4 ml = -s1, mh = 0;
3590                                 while (ml < -32768) {ml += 65536; mh--;}
3591                                 M_LDA(REG_PV, REG_RA, ml);
3592                                 M_LDAH(REG_PV, REG_PV, mh);
3593                             }
3594                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3595                         M_INTMOVE(REG_RESULT, s1);
3596                         store_reg_to_var_int(iptr->dst, s1);
3597                         break;
3598
3599
3600                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3601                          error();
3602
3603
3604
3605         } /* switch */
3606
3607         } /* for instruction */
3608
3609         /* copy values to interface registers */
3610
3611         src = bptr->outstack;
3612         len = bptr->outdepth;
3613         MCODECHECK(64+len);
3614         while (src) {
3615                 len--;
3616                 if ((src->varkind != STACKVAR)) {
3617                         s2 = src->type;
3618                         if (IS_FLT_DBL_TYPE(s2)) {
3619                                 var_to_reg_flt(s1, src, REG_FTMP1);
3620                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3621                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3622                                         }
3623                                 else {
3624                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3625                                         }
3626                                 }
3627                         else {
3628                                 var_to_reg_int(s1, src, REG_ITMP1);
3629                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3630                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3631                                         }
3632                                 else {
3633                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3634                                         }
3635                                 }
3636                         }
3637                 src = src->prev;
3638                 }
3639         } /* if (bptr -> flags >= BBREACHED) */
3640         } /* for basic block */
3641
3642         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3643
3644         {
3645         /* generate bound check stubs */
3646
3647         s4 *xcodeptr = NULL;
3648
3649         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3650                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3651                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3652                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3653                         continue;
3654                         }
3655
3656
3657                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3658                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3659
3660                 MCODECHECK(8);
3661
3662                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3663
3664                 if (xcodeptr != NULL) {
3665                         M_BR((xcodeptr-mcodeptr)-1);
3666                         }
3667                 else {
3668                         xcodeptr = mcodeptr;
3669
3670                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3671                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3672
3673                         a = dseg_addaddress(asm_handle_exception);
3674                         M_ALD(REG_ITMP3, REG_PV, a);
3675
3676                         M_JMP(REG_ZERO, REG_ITMP3);
3677                         }
3678                 }
3679
3680         /* generate negative array size check stubs */
3681
3682         xcodeptr = NULL;
3683
3684         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3685                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3686                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3687                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3688                         continue;
3689                         }
3690
3691                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3692                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3693
3694                 MCODECHECK(8);
3695
3696                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3697
3698                 if (xcodeptr != NULL) {
3699                         M_BR((xcodeptr-mcodeptr)-1);
3700                         }
3701                 else {
3702                         xcodeptr = mcodeptr;
3703
3704                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3705                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3706
3707                         a = dseg_addaddress(asm_handle_exception);
3708                         M_ALD(REG_ITMP3, REG_PV, a);
3709
3710                         M_JMP(REG_ZERO, REG_ITMP3);
3711                         }
3712                 }
3713
3714         /* generate cast check stubs */
3715
3716         xcodeptr = NULL;
3717
3718         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3719                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3720                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3721                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3722                         continue;
3723                         }
3724
3725                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3726                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3727
3728                 MCODECHECK(8);
3729
3730                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3731
3732                 if (xcodeptr != NULL) {
3733                         M_BR((xcodeptr-mcodeptr)-1);
3734                         }
3735                 else {
3736                         xcodeptr = mcodeptr;
3737
3738                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3739                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3740
3741                         a = dseg_addaddress(asm_handle_exception);
3742                         M_ALD(REG_ITMP3, REG_PV, a);
3743
3744                         M_JMP(REG_ZERO, REG_ITMP3);
3745                         }
3746                 }
3747
3748
3749 #ifdef SOFTNULLPTRCHECK
3750
3751         /* generate null pointer check stubs */
3752
3753         xcodeptr = NULL;
3754
3755         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3756                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3757                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3758                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3759                         continue;
3760                         }
3761
3762                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3763                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3764
3765                 MCODECHECK(8);
3766
3767                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3768
3769                 if (xcodeptr != NULL) {
3770                         M_BR((xcodeptr-mcodeptr)-1);
3771                         }
3772                 else {
3773                         xcodeptr = mcodeptr;
3774
3775                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3776                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3777
3778                         a = dseg_addaddress(asm_handle_exception);
3779                         M_ALD(REG_ITMP3, REG_PV, a);
3780
3781                         M_JMP(REG_ZERO, REG_ITMP3);
3782                         }
3783                 }
3784
3785 #endif
3786         }
3787
3788         mcode_finish((int)((u1*) mcodeptr - mcodebase));
3789 }
3790
3791
3792 /* redefinition of code generation macros (compiling into array) **************/
3793
3794 /*
3795 These macros are newly defined to allow code generation into an array.
3796 This is necessary, because the original M_.. macros generate code by
3797 calling 'mcode_adds4' that uses an additional data structure to
3798 receive the code.
3799
3800 For a faster (but less flexible) version to generate code, these
3801 macros directly use the (s4* p) - pointer to put the code directly
3802 in a locally defined array.
3803 This makes sense only for the stub-generation-routines below.
3804 */
3805
3806 #undef M_OP3
3807 #define M_OP3(op,fu,a,b,c,const) \
3808         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<(16-3*(const)))| \
3809         ((const)<<12)|((fu)<<5)|((c)) )
3810 #undef M_FOP3
3811 #define M_FOP3(op,fu,a,b,c) \
3812         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((fu)<<5)|(c) )
3813 #undef M_BRA
3814 #define M_BRA(op,a,disp) \
3815         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((disp)&0x1fffff) )
3816 #undef M_MEM
3817 #define M_MEM(op,a,b,disp) \
3818         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((disp)&0xffff) )
3819
3820
3821 /* function createcompilerstub *************************************************
3822
3823         creates a stub routine which calls the compiler
3824
3825 *******************************************************************************/
3826
3827 #define COMPSTUBSIZE 3
3828
3829 u1 *createcompilerstub (methodinfo *m)
3830 {
3831         u8 *s = CNEW (u8, COMPSTUBSIZE);    /* memory to hold the stub            */
3832         s4 *p = (s4*) s;                    /* code generation pointer            */
3833
3834                                             /* code for the stub                  */
3835         M_ALD (REG_PV, REG_PV, 16);         /* load pointer to the compiler       */
3836         M_JMP (0, REG_PV);                  /* jump to the compiler, return address
3837                                                in reg 0 is used as method pointer */
3838         s[1] = (u8) m;                      /* literals to be adressed            */
3839         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3840
3841 #ifdef STATISTICS
3842         count_cstub_len += COMPSTUBSIZE * 8;
3843 #endif
3844
3845         return (u1*) s;
3846 }
3847
3848
3849 /* function removecompilerstub *************************************************
3850
3851      deletes a compilerstub from memory  (simply by freeing it)
3852
3853 *******************************************************************************/
3854
3855 void removecompilerstub (u1 *stub)
3856 {
3857         CFREE (stub, COMPSTUBSIZE * 8);
3858 }
3859
3860 /* function: createnativestub **************************************************
3861
3862         creates a stub routine which calls a native method
3863
3864 *******************************************************************************/
3865
3866 #define NATIVESTUBSIZE 34
3867 #define NATIVESTUBOFFSET 8
3868
3869 int runverbosenat = 0;
3870
3871 u1 *createnativestub (functionptr f, methodinfo *m)
3872 {
3873         int disp;
3874         u8 *s = CNEW (u8, NATIVESTUBSIZE);  /* memory to hold the stub            */
3875         u8 *cs = s + NATIVESTUBOFFSET;
3876         s4 *p = (s4*) (cs);                 /* code generation pointer            */
3877
3878         *(cs-1) = (u8) f;                   /* address of native method           */
3879         *(cs-2) = (u8) (&exceptionptr);     /* address of exceptionptr            */
3880         *(cs-3) = (u8) asm_handle_nat_exception; /* addr of asm exception handler */
3881         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
3882         *(cs-5) = (u8) asm_builtin_trace;
3883         *(cs-6) = (u8) m;
3884         *(cs-7) = (u8) asm_builtin_exittrace;
3885         *(cs-8) = (u8) builtin_trace_exception;
3886
3887 #if 0
3888         printf("stub: ");
3889         utf_display(m->class->name);
3890         printf(".");
3891         utf_display(m->name);
3892         printf(" 0x%p\n", cs);
3893 #endif
3894
3895         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3896         M_AST  (REG_RA, REG_SP, 0);         /* store return address               */
3897
3898 #if 1
3899         if (runverbosenat) {
3900                 M_ALD(REG_ITMP1, REG_PV, -6*8);
3901                 M_ALD(REG_PV, REG_PV, -5*8);
3902
3903                 M_JSR(REG_RA, REG_PV);
3904                 disp = -(int) (p - (s4*) cs)*4;
3905                 M_LDA(REG_PV, REG_RA, disp);
3906         }
3907 #endif
3908
3909         reg_init();
3910
3911         M_MOV  (argintregs[4],argintregs[5]);
3912         M_FMOV (argfltregs[4],argfltregs[5]);
3913
3914         M_MOV  (argintregs[3],argintregs[4]);
3915         M_FMOV (argfltregs[3],argfltregs[4]);
3916
3917         M_MOV  (argintregs[2],argintregs[3]);
3918         M_FMOV (argfltregs[2],argfltregs[3]);
3919
3920         M_MOV  (argintregs[1],argintregs[2]);
3921         M_FMOV (argfltregs[1],argfltregs[2]);
3922
3923         M_MOV  (argintregs[0],argintregs[1]);
3924         M_FMOV (argfltregs[0],argfltregs[1]);
3925
3926         M_ALD  (argintregs[0], REG_PV, -4*8);/* load adress of jni_environement   */
3927
3928         M_ALD  (REG_PV, REG_PV, -1*8);      /* load adress of native method       */
3929         M_JSR  (REG_RA, REG_PV);            /* call native method                 */
3930
3931         disp = -(int) (p - (s4*) cs)*4;
3932         M_LDA  (REG_PV, REG_RA, disp);      /* recompute pv from ra               */
3933         M_ALD  (REG_ITMP3, REG_PV, -2*8);   /* get address of exceptionptr        */
3934
3935         M_ALD  (REG_ITMP1, REG_ITMP3, 0);   /* load exception into reg. itmp1     */
3936         M_BNEZ (REG_ITMP1,
3937                         3 + (runverbosenat ? 6 : 0));  /* if no exception then return        */
3938
3939 #if 1
3940         if (runverbosenat) {
3941                 M_ALD(argintregs[0], REG_PV, -6*8);
3942                 M_MOV(REG_RESULT, argintregs[1]);
3943                 M_FMOV(REG_FRESULT, argfltregs[2]);
3944                 M_FMOV(REG_FRESULT, argfltregs[3]);
3945                 M_ALD(REG_PV, REG_PV, -7*8);
3946                 M_JSR(REG_RA, REG_PV);
3947         }
3948 #endif
3949
3950         M_ALD  (REG_RA, REG_SP, 0);         /* load return address                */
3951         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe                  */
3952
3953         M_RET  (REG_ZERO, REG_RA);          /* return to caller                   */
3954
3955         M_AST  (REG_ZERO, REG_ITMP3, 0);    /* store NULL into exceptionptr       */
3956
3957 #if 1
3958         if (runverbosenat) {
3959                 M_LDA(REG_SP, REG_SP, -8);
3960                 M_AST(REG_ITMP1, REG_SP, 0);
3961                 M_MOV(REG_ITMP1, argintregs[0]);
3962                 M_ALD(argintregs[1], REG_PV, -6*8);
3963                 M_ALD(argintregs[2], REG_SP, 0);
3964                 M_CLR(argintregs[3]);
3965                 M_ALD(REG_PV, REG_PV, -8*8);
3966                 M_JSR(REG_RA, REG_PV);
3967                 disp = -(int) (p - (s4*) cs)*4;
3968                 M_LDA  (REG_PV, REG_RA, disp);
3969                 M_ALD(REG_ITMP1, REG_SP, 0);
3970                 M_LDA(REG_SP, REG_SP, 8);
3971         }
3972 #endif
3973
3974         M_ALD  (REG_RA, REG_SP, 0);         /* load return address                */
3975         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe                  */
3976
3977         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3978
3979         M_ALD  (REG_ITMP3, REG_PV, -3*8);   /* load asm exception handler address */
3980         M_JMP  (REG_ZERO, REG_ITMP3);       /* jump to asm exception handler      */
3981
3982 #if 0
3983         {
3984                 static int stubprinted;
3985                 if (!stubprinted)
3986                         printf("stubsize: %d/2\n", (int) (p - (s4*) s));
3987                 stubprinted = 1;
3988         }
3989 #endif
3990
3991 #ifdef STATISTICS
3992         count_nstub_len += NATIVESTUBSIZE * 8;
3993 #endif
3994
3995         return (u1*) (s + NATIVESTUBOFFSET);
3996 }
3997
3998 /* function: removenativestub **************************************************
3999
4000     removes a previously created native-stub from memory
4001
4002 *******************************************************************************/
4003
4004 void removenativestub (u1 *stub)
4005 {
4006         CFREE ((u8*) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4007 }
4008
4009
4010 /*
4011  * These are local overrides for various environment variables in Emacs.
4012  * Please do not remove this and leave it at the end of the file, where
4013  * Emacs will automagically detect them.
4014  * ---------------------------------------------------------------------
4015  * Local variables:
4016  * mode: c
4017  * indent-tabs-mode: t
4018  * c-basic-offset: 4
4019  * tab-width: 4
4020  * End:
4021  */