state <= IDLE;
push_history <= '0';
spalte <= "0000000";
+ spalte_next <= "0000000";
zeile <= "0000000";
+ zeile_next <= "0000000";
+ d_get <= '0';
+ tx_new <= '0';
+ tx_data <= "00000000";
elsif rising_edge(sys_clk) then
push_history <= push_history_next;
spalte <= spalte_next;
process (spalte_up)
variable spalte_tmp, zeile_tmp : integer;
+ variable spalte2_tmp, zeile2_tmp : std_logic_vector(7 downto 0);
begin
if (spalte_up = '1') then
if (spalte > X"45") then
spalte_next <= "0000000";
- zeile_tmp := to_integer(unsigned(zeile));
- zeile_tmp := zeile_tmp + 1;
- zeile_next <= hbyte(to_unsigned(zeile_tmp,8));
+ zeile_tmp := to_integer(unsigned(zeile)) + 1;
+ zeile2_tmp := std_logic_vector(to_unsigned(zeile_tmp,8));
+ zeile_next <= hzeile(zeile2_tmp(6 downto 0));
else
- spalte_tmp := to_integer(unsigned(spalte));
- spalte_tmp := spalte_tmp + 1;
- spalte_next <= hbyte(to_unsigned(spalte_tmp,8));
+ spalte_tmp := to_integer(unsigned(spalte)) + 1;
+ spalte2_tmp := std_logic_vector(to_unsigned(spalte_tmp,8));
+ spalte_next <= hspalte(spalte2_tmp(6 downto 0));
+
zeile_next <= zeile;
end if;
spalte_up <= '0';
end if;
end process async_push_history;
- output_pc : process (zeile, spalte)
+ output_pc : process (state, zeile, spalte, char)
begin
+ d_get <= '0';
+ spalte_next <= "0000000";
+ zeile_next <= "0000000";
case state is
when IDLE =>
- spalte_next <= "0000000";
- zeile_next <= "0000000";
+ null;
when FETCH =>
- d_zeile <= zeile;
- d_spalte <= spalte;
+ d_zeile <= zeile_next;
+ d_spalte <= spalte_next;
d_get <= '1';
char_en <= '1';
-- wait for timer overflow
end case;
end process output_pc;
- next_state_pc : process (rx_new, btn_a)
+ next_state_pc : process (rx_new, btn_a, d_done, tx_done)
begin
+ spalte_up <= '0';
case state is
when IDLE =>
- if rx_new= '1' or btn_a = '1' then
+ if rx_new = '1' or btn_a = '1' then
state_next <= FETCH;
char <= d_char; --latch
end if;
when FORWARD =>
if (tx_done = '1') then
state_next <= FETCH;
+ spalte_up <= '1';
end if;
when DONE =>
-- be there for a single cycle and then