top-level/pll: pinmapping fixed und pll angepasst
[hwmod.git] / quartus / project_gen.tcl
index 9c46c01d223225324fe61d8a4f723585436b54cd..584c7364188bb9ac6480df3e11a7535fa4e771e6 100644 (file)
@@ -91,18 +91,18 @@ if {$make_assignments} {
        #vga
        set_location_assignment PIN_F1 -to hsync_n
        set_location_assignment PIN_F2 -to vsync_n
-       set_location_assignment E22 -to r[0]
-       set_location_assignment T4 -to r[1]
-       set_location_assignment T7 -to r[2]
-       set_location_assignment E23 -to g[0]
-       set_location_assignment T5 -to g[1]
-       set_location_assignment T24 -to g[2]
-       set_location_assignment E24 -to b[0]
-       set_location_assignment T6 -to b[1]
+       set_location_assignment PIN_E22 -to r[0]
+       set_location_assignment PIN_T4 -to r[1]
+       set_location_assignment PIN_T7 -to r[2]
+       set_location_assignment PIN_E23 -to g[0]
+       set_location_assignment PIN_T5 -to g[1]
+       set_location_assignment PIN_T24 -to g[2]
+       set_location_assignment PIN_E24 -to b[0]
+       set_location_assignment PIN_T6 -to b[1]
 
        #ps/2
-       set_location_assignment Y26 -to ps2_clk
-       set_location_assignment E21 -to ps2_data
+       set_location_assignment PIN_Y26 -to ps2_clk
+       set_location_assignment PIN_E21 -to ps2_data
 
        set_global_assignment -name FMAX_REQUIREMENT "33.33 MHz" -section_id sys_clk
        set_instance_assignment -name CLOCK_SETTINGS sys_clk -to sys_clk