after slot5
[dide_16.git] / bsp4 / Designflow / syn / rev_1 / vga.tlg
diff --git a/bsp4/Designflow/syn/rev_1/vga.tlg b/bsp4/Designflow/syn/rev_1/vga.tlg
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+@N: CD630 :"/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_ent.vhd":38:7:38:9|Synthesizing work.vga.behav 
+@N: CD231 :"/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_pak.vhd":60:24:60:25|Using onehot encoding for type hsync_state_type (reset_state="1000000")
+@N: CD231 :"/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_pak.vhd":62:24:62:25|Using onehot encoding for type vsync_state_type (reset_state="1000000")
+@N: CD630 :"/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_control_ent.vhd":37:7:37:17|Synthesizing work.vga_control.behav 
+Post processing for work.vga_control.behav
+@N: CD630 :"/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_driver_ent.vhd":37:7:37:16|Synthesizing work.vga_driver.behav 
+@N: CD231 :"/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_pak.vhd":60:24:60:25|Using onehot encoding for type hsync_state_type (reset_state="1000000")
+@N: CD231 :"/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_pak.vhd":62:24:62:25|Using onehot encoding for type vsync_state_type (reset_state="1000000")
+Post processing for work.vga_driver.behav
+@N: CD630 :"/homes/burban/didelu/dide_16/bsp4/Designflow/src/board_driver_ent.vhd":36:7:36:18|Synthesizing work.board_driver.behav 
+Post processing for work.board_driver.behav
+Post processing for work.vga.behav