after slot5
[dide_16.git] / bsp4 / Designflow / sim / pre / work / _info
diff --git a/bsp4/Designflow/sim/pre/work/_info b/bsp4/Designflow/sim/pre/work/_info
new file mode 100644 (file)
index 0000000..e2d4eda
--- /dev/null
@@ -0,0 +1,230 @@
+m255
+K3
+13
+cModel Technology
+Z0 d/homes/burban/didelu/dide_16/bsp4/Designflow/sim/pre
+T_opt
+V9ZLk`O78oFgz7?3D`AM6m3
+04 12 0 work vga_conf_pre 1
+Z1 =1-0015609ed0a8-4af058ea-7c4d1-790d
+Z2 o-quiet -auto_acc_if_foreign -work work
+Z3 n@_opt
+Z4 OE;O;6.5b;42
+Evga
+Z5 w1257265305
+Z6 DPx4 ieee 16 vital_primitives 0 22 E9g6AWKAc2T]enMfl94If3
+Z7 DPx7 stratix 17 stratix_atom_pack 0 22 4LU4R]0>3N6GcAdgd1O1R2
+Z8 DPx4 ieee 12 vital_timing 0 22 OBWK>;kUYmkG<OChK2lhV1
+Z9 DPx7 stratix 18 stratix_components 0 22 ETJi=`V@8?ceQEj0KODmn3
+Z10 DPx8 synplify 10 components 0 22 @=LFfPB8UiBPm8Y3jZ0Dj3
+Z11 DPx4 ieee 11 numeric_std 0 22 =NSdli^?T5OD8;4F<blj<3
+Z12 DPx4 ieee 14 std_logic_1164 0 22 GH1=`jDDBJ=`LM;:Ak`kf2
+Z13 8/homes/burban/didelu/dide_16/bsp4/Designflow/syn/rev_1/vga.vhm
+Z14 F/homes/burban/didelu/dide_16/bsp4/Designflow/syn/rev_1/vga.vhm
+l0
+L4533
+Z15 V_AKaP>g_z3;H?[j4SIkEJ3
+Z16 OE;C;6.5b;42
+32
+Z17 o-work work
+Z18 tExplicit 1
+Z19 !s100 GLiW2HX1d;F:740SRcE`T1
+Abeh
+R6
+R7
+R8
+R9
+R10
+R11
+R12
+Z20 DEx4 work 3 vga 0 22 _AKaP>g_z3;H?[j4SIkEJ3
+l4873
+L4570
+Z21 V4MkFMEzoaBO_>SXMeUCLU0
+R16
+32
+Z22 Mx7 4 ieee 14 std_logic_1164
+Z23 Mx6 4 ieee 11 numeric_std
+Z24 Mx5 8 synplify 10 components
+Z25 Mx4 7 stratix 18 stratix_components
+Z26 Mx3 4 ieee 12 vital_timing
+Z27 Mx2 7 stratix 17 stratix_atom_pack
+Z28 Mx1 4 ieee 16 vital_primitives
+R17
+R18
+Z29 !s100 IFXRAMl`fOYGC@`o>zE=S3
+Cvga_conf_pre
+Z30 astructure
+Z31 evga_pre_tb
+R6
+R7
+R8
+R9
+R10
+R11
+R20
+Z32 DAx4 work 10 vga_pre_tb 9 structure 22 JFe?g0DaUzZBYk[>IoSWP0
+Z33 DPx4 work 7 vga_pak 0 22 HkmzP=gd;mD@MOhh4AYKl3
+Z34 DPx4 ieee 15 std_logic_arith 0 22 GJbAT?7@hRQU9IQ702DT]2
+Z35 DPx4 ieee 18 std_logic_unsigned 0 22 hEMVMlaNCR^<OOoVNV;m90
+R12
+Z36 DEx4 work 10 vga_pre_tb 0 22 lBieNQVlYd]7:AWzH`k4l2
+Z37 w1257262050
+Z38 8/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_pre_tb.vhd
+Z39 F/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_pre_tb.vhd
+l0
+L189
+Z40 VaNjILBk^@SVk6Z1ONfaFf3
+R16
+32
+Z41 Mx10 4 ieee 14 std_logic_1164
+Z42 Mx9 4 ieee 18 std_logic_unsigned
+Z43 Mx8 4 ieee 15 std_logic_arith
+Z44 Mx7 4 work 7 vga_pak
+R23
+R24
+R25
+R26
+R27
+R28
+R17
+R18
+Z45 !s100 VZQjaChjIO3TWTR03Wl1B1
+Evga_control
+R5
+R6
+R7
+R8
+R9
+R10
+R11
+R12
+R13
+R14
+l0
+L21
+Z46 Vc[8UcKzm1=5YbM[1P_A8V0
+R16
+32
+R17
+R18
+Z47 !s100 QQaQ1z6<=O3a[ZeJl5eU?2
+Abeh
+R6
+R7
+R8
+R9
+R10
+R11
+R12
+Z48 DEx4 work 11 vga_control 0 22 c[8UcKzm1=5YbM[1P_A8V0
+l133
+L78
+Z49 VM2^VYFBjUfEgbCAe?[1`a0
+R16
+32
+R22
+R23
+R24
+R25
+R26
+R27
+R28
+R17
+R18
+Z50 !s100 RC]fSSYMGlQdlomZHN6N81
+Evga_driver
+R5
+R6
+R7
+R8
+R9
+R10
+R11
+R12
+R13
+R14
+l0
+L1308
+Z51 V][gj?A8M9aEN4T?IfB[nn2
+R16
+32
+R17
+R18
+Z52 !s100 c<J3@6GSPO89]PVD@Ao@@0
+Abeh
+R6
+R7
+R8
+R9
+R10
+R11
+R12
+Z53 DEx4 work 10 vga_driver 0 22 ][gj?A8M9aEN4T?IfB[nn2
+l1506
+L1377
+Z54 VeB^:=KgUKlJ:>DP5D^=MT3
+R16
+32
+R22
+R23
+R24
+R25
+R26
+R27
+R28
+R17
+R18
+Z55 !s100 ShYcRb34UG[M_Lj;KLTFh0
+Pvga_pak
+R34
+R35
+R12
+Z56 w1257265128
+Z57 8/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_pak.vhd
+Z58 F/homes/burban/didelu/dide_16/bsp4/Designflow/src/vga_pak.vhd
+l0
+L35
+Z59 VHkmzP=gd;mD@MOhh4AYKl3
+R16
+32
+Z60 Mx3 4 ieee 14 std_logic_1164
+Z61 Mx2 4 ieee 18 std_logic_unsigned
+Z62 Mx1 4 ieee 15 std_logic_arith
+R17
+R18
+Z63 !s100 VL:Z2?FJISz9N5>XaK:5k0
+Evga_pre_tb
+R37
+R33
+R34
+R35
+R12
+R38
+R39
+l0
+L37
+Z64 VlBieNQVlYd]7:AWzH`k4l2
+R16
+32
+R17
+R18
+Z65 !s100 E`OC=4TKQQZR9AW6:_aWL3
+Astructure
+R33
+R34
+R35
+R12
+R36
+l101
+L45
+Z66 VJFe?g0DaUzZBYk[>IoSWP0
+R16
+32
+Z67 Mx4 4 ieee 14 std_logic_1164
+Z68 Mx3 4 ieee 18 std_logic_unsigned
+Z69 Mx2 4 ieee 15 std_logic_arith
+Z70 Mx1 4 work 7 vga_pak
+R17
+R18
+Z71 !s100 mXQY>;W35^hoSE<0NCLIV3