after slot5

[dide_16.git] / bsp4 / Designflow / ppr / sim / vga.tan.summary

diff --git a/bsp4/Designflow/ppr/sim/vga.tan.summary b/bsp4/Designflow/ppr/sim/vga.tan.summary
new file mode 100644 (file)
index 0000000..00a1e6c
--- /dev/null
+++ b/bsp4/Designflow/ppr/sim/vga.tan.summary
@@ -0,0 +1,66 @@
+--------------------------------------------------------------------------------------
+Timing Analyzer Summary
+--------------------------------------------------------------------------------------
+
+Type           : Worst-case tsu
+Slack          : N/A
+Required Time  : None
+Actual Time    : 7.334 ns
+From           : reset_pin
+To             : vga_driver:vga_driver_unit|hsync_state_0
+From Clock     : --
+To Clock       : clk_pin
+Failed Paths   : 0
+
+Type           : Worst-case tco
+Slack          : N/A
+Required Time  : None
+Actual Time    : 10.905 ns
+From           : vga_driver:vga_driver_unit|vsync_state_0
+To             : d_set_vsync_counter
+From Clock     : clk_pin
+To Clock       : --
+Failed Paths   : 0
+
+Type           : Worst-case tpd
+Slack          : N/A
+Required Time  : None
+Actual Time    : 12.465 ns
+From           : reset_pin
+To             : seven_seg_pin[2]
+From Clock     : --
+To Clock       : --
+Failed Paths   : 0
+
+Type           : Worst-case th
+Slack          : N/A
+Required Time  : None
+Actual Time    : -3.191 ns
+From           : reset_pin
+To             : vga_driver:vga_driver_unit|vsync_state_6
+From Clock     : --
+To Clock       : clk_pin
+Failed Paths   : 0
+
+Type           : Clock Setup: 'clk_pin'
+Slack          : N/A
+Required Time  : None
+Actual Time    : 182.42 MHz ( period = 5.482 ns )
+From           : vga_driver:vga_driver_unit|hsync_state_0
+To             : vga_driver:vga_driver_unit|line_counter_sig_2
+From Clock     : clk_pin
+To Clock       : clk_pin
+Failed Paths   : 0
+
+Type           : Total number of failed paths
+Slack          : 
+Required Time  : 
+Actual Time    : 
+From           : 
+To             : 
+From Clock     : 
+To Clock       : 
+Failed Paths   : 0
+
+--------------------------------------------------------------------------------------
+