after slot5

[dide_16.git] / bsp4 / Designflow / ppr / download / db / vga_pll.lpc.txt

diff --git a/bsp4/Designflow/ppr/download/db/vga_pll.lpc.txt b/bsp4/Designflow/ppr/download/db/vga_pll.lpc.txt
new file mode 100644 (file)
index 0000000..93f2bc0
--- /dev/null
+++ b/bsp4/Designflow/ppr/download/db/vga_pll.lpc.txt
@@ -0,0 +1,10 @@
++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Legal Partition Candidates                                                                                                                                                                                                 ;
++-----------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
+; Hierarchy             ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
++-----------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
+; inst1                 ; 1     ; 0              ; 0            ; 0              ; 1      ; 0               ; 0             ; 0               ; 0     ; 0              ; 0            ; 0                ; 0                 ;
+; inst|vga_control_unit ; 24    ; 0              ; 0            ; 0              ; 29     ; 0               ; 0             ; 0               ; 0     ; 0              ; 0            ; 0                ; 0                 ;
+; inst|vga_driver_unit  ; 4     ; 0              ; 0            ; 0              ; 61     ; 0               ; 0             ; 0               ; 0     ; 0              ; 0            ; 0                ; 0                 ;
+; inst                  ; 2     ; 0              ; 0            ; 0              ; 115    ; 0               ; 0             ; 0               ; 0     ; 0              ; 0            ; 0                ; 0                 ;
++-----------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+