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4er slot (3. bsp fertig)
[dide_16.git] / bsp3 / Designflow / syn / rev_1 / syntmp / vga_toc.htm
diff --git a/bsp3/Designflow/syn/rev_1/syntmp/vga_toc.htm b/bsp3/Designflow/syn/rev_1/syntmp/vga_toc.htm
new file mode 100644 (file)
index 0000000..1258eb2
--- /dev/null
+++ b/bsp3/Designflow/syn/rev_1/syntmp/vga_toc.htm
@@ -0,0 +1,17 @@
+<table border="0" cellpadding="0" cellspacing="2">
+<tr>
+<td nowrap class="content" valign="top">
+<body bgcolor="#e0e0ff">
+<dl>
+<font size=3><b>rev_1 (vga)</b><br></font>
+<b><a href="vga_srr.htm#compilerReport24" target="srrFrame">Compiler Report</a></b><br>
+<b><a href="vga_srr.htm#mapperReport25" target="srrFrame">Mapper Report</a></b><br>
+<b><a href="vga_srr.htm#timingReport26" target="srrFrame">Timing Report</a></b><br>
+<a href="vga_srr.htm#performanceSummary27" target="srrFrame">Performance Summary</a><br>
+<a href="vga_srr.htm#clockRelationships28" target="srrFrame">Clock Relationships</a><br>
+<a href="vga_srr.htm#interfaceInfo29" target="srrFrame">Interface Information</a><br>
+<a href="vga_srr.htm#clockReport30" target="srrFrame">Detailed Report for Clock: vga|clk_pin</a><br>
+&nbsp;&nbsp;&nbsp;<a href="vga_srr.htm#startingSlack31" target="srrFrame">Starting Points with Worst Slack</a><br>
+&nbsp;&nbsp;&nbsp;<a href="vga_srr.htm#endingSlack32" target="srrFrame">Ending Points with Worst Slack</a><br>
+&nbsp;&nbsp;&nbsp;<a href="vga_srr.htm#worstPaths33" target="srrFrame">Worst Path Information</a><br>
+<b><a href="vga_srr.htm#areaReport34" target="srrFrame">Resource Utilization</a></b><br>
dide laboruebung (ws09)