4er slot (3. bsp fertig)
[dide_16.git] / bsp3 / Designflow / ppr / sim / db / vga.pre_map.cdb
diff --git a/bsp3/Designflow/ppr/sim/db/vga.pre_map.cdb b/bsp3/Designflow/ppr/sim/db/vga.pre_map.cdb
new file mode 100644 (file)
index 0000000..8b4851c
Binary files /dev/null and b/bsp3/Designflow/ppr/sim/db/vga.pre_map.cdb differ