--- /dev/null
+Assembler report for vga_pll
+Thu Oct 29 17:13:25 2009
+Quartus II Version 9.0 Build 132 02/25/2009 SJ Full Version
+
+
+---------------------
+; Table of Contents ;
+---------------------
+ 1. Legal Notice
+ 2. Assembler Summary
+ 3. Assembler Settings
+ 4. Assembler Generated Files
+ 5. Assembler Device Options: vga_pll.sof
+ 6. Assembler Device Options: vga_pll.pof
+ 7. Assembler Messages
+
+
+
+----------------
+; Legal Notice ;
+----------------
+Copyright (C) 1991-2009 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Altera Program License
+Subscription Agreement, Altera MegaCore Function License
+Agreement, or other applicable license agreement, including,
+without limitation, that your use is for the sole purpose of
+programming logic devices manufactured by Altera and sold by
+Altera or its authorized distributors. Please refer to the
+applicable agreement for further details.
+
+
+
++---------------------------------------------------------------+
+; Assembler Summary ;
++-----------------------+---------------------------------------+
+; Assembler Status ; Successful - Thu Oct 29 17:13:25 2009 ;
+; Revision Name ; vga_pll ;
+; Top-level Entity Name ; vga_pll ;
+; Family ; Stratix ;
+; Device ; EP1S25F672C6 ;
++-----------------------+---------------------------------------+
+
+
++--------------------------------------------------------------------------------------------------------+
+; Assembler Settings ;
++-----------------------------------------------------------------------------+----------+---------------+
+; Option ; Setting ; Default Value ;
++-----------------------------------------------------------------------------+----------+---------------+
+; Use smart compilation ; Off ; Off ;
+; Compression mode ; Off ; Off ;
+; Clock source for configuration device ; Internal ; Internal ;
+; Clock frequency of the configuration device ; 10 MHZ ; 10 MHz ;
+; Divide clock frequency by ; 1 ; 1 ;
+; Auto user code ; Off ; Off ;
+; Use configuration device ; On ; On ;
+; Configuration device ; Auto ; Auto ;
+; Configuration device auto user code ; Off ; Off ;
+; Auto-increment JTAG user code for multiple configuration devices ; On ; On ;
+; Disable CONF_DONE and nSTATUS pull-ups on configuration device ; Off ; Off ;
+; Generate Tabular Text File (.ttf) For Target Device ; Off ; Off ;
+; Generate Raw Binary File (.rbf) For Target Device ; Off ; Off ;
+; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; Off ; Off ;
+; Hexadecimal Output File start address ; 0 ; 0 ;
+; Hexadecimal Output File count direction ; Up ; Up ;
+; Release clears before tri-states ; Off ; Off ;
+; Auto-restart configuration after error ; On ; On ;
+; Use Checkered Pattern as Uninitialized RAM Content ; Off ; Off ;
+; Generate Serial Vector Format File (.svf) for Target Device ; Off ; Off ;
+; Generate a JEDEC STAPL Format File (.jam) for Target Device ; Off ; Off ;
+; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off ; Off ;
+; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On ; On ;
++-----------------------------------------------------------------------------+----------+---------------+
+
+
++---------------------------+
+; Assembler Generated Files ;
++---------------------------+
+; File Name ;
++---------------------------+
+; vga_pll.sof ;
+; vga_pll.pof ;
++---------------------------+
+
+
++---------------------------------------+
+; Assembler Device Options: vga_pll.sof ;
++----------------+----------------------+
+; Option ; Setting ;
++----------------+----------------------+
+; Device ; EP1S25F672C6 ;
+; JTAG usercode ; 0xFFFFFFFF ;
+; Checksum ; 0x002DD409 ;
++----------------+----------------------+
+
+
++---------------------------------------+
+; Assembler Device Options: vga_pll.pof ;
++--------------------+------------------+
+; Option ; Setting ;
++--------------------+------------------+
+; Device ; EPC8 ;
+; JTAG usercode ; 0xFFFFFFFF ;
+; Checksum ; 0x0BFCDE72 ;
+; Compression Ratio ; 1 ;
++--------------------+------------------+
+
+
++--------------------+
+; Assembler Messages ;
++--------------------+
+Info: *******************************************************************
+Info: Running Quartus II Assembler
+ Info: Version 9.0 Build 132 02/25/2009 SJ Full Version
+ Info: Processing started: Thu Oct 29 17:13:07 2009
+Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off vga_pll -c vga_pll
+Info: Assembler is generating device programming files
+Info: Quartus II Assembler was successful. 0 errors, 0 warnings
+ Info: Peak virtual memory: 269 megabytes
+ Info: Processing ended: Thu Oct 29 17:13:25 2009
+ Info: Elapsed time: 00:00:18
+ Info: Total CPU time (on all processors): 00:00:18
+
+
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