dritter slot
[dide_16.git] / bsp2 / Designflow / ppr / sim / simulation / modelsim / vga.sft
diff --git a/bsp2/Designflow/ppr/sim/simulation/modelsim/vga.sft b/bsp2/Designflow/ppr/sim/simulation/modelsim/vga.sft
new file mode 100644 (file)
index 0000000..dffb074
--- /dev/null
@@ -0,0 +1,4 @@
+set tool_name "ModelSim (VHDL)"
+set corner_file_list {
+       {{"Slow Model"} {vga.vho vga_vhd.sdo}}
+}