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7seg small changes
[calu.git]
/
cpu
/
src
/
writeback_stage_b.vhd
diff --git
a/cpu/src/writeback_stage_b.vhd
b/cpu/src/writeback_stage_b.vhd
index 307996ea3df2b8aa5c273f17aadc7bb6690ef8a5..8c13049009229ccac1826458c1ae41d9df3b989c 100644
(file)
--- a/
cpu/src/writeback_stage_b.vhd
+++ b/
cpu/src/writeback_stage_b.vhd
@@
-224,6
+224,7
@@
begin
ext_7seg.addr <= wb_reg_nxt.address(31 downto 2);
ext_7seg.byte_en(1 downto 0) <= wb_reg_nxt.address(1 downto 0);
+
-- case wb_reg_nxt.address(1 downto 0) is
-- when "00" => ext_7seg.byte_en <= "0001";
-- when "01" => ext_7seg.byte_en <= "0010";