end if;
- if wb_reg.hword = '1' or wb_reg.byte_s = '1' then
- if wb_reg.address(1)='1' then
- data_out(hword_t'range) := data_out(data_out'high downto (data_out'length/2));
- end if;
- data_out(data_out'high downto (data_out'length/2)) := (others => '0');
- if byte_s = '1' then
- if wb_reg.address(0) = '1' then
- data_out(byte_t'range) := data_out(hword_t'high downto (hword_t'length/2));
- end if;
- data_out(hword_t'high downto (hword_t'length/2)) := (others => '0');
- end if;
- end if;
+-- if wb_reg.hword = '1' or wb_reg.byte_s = '1' then
+-- if wb_reg.address(1)='1' then
+-- data_out(hword_t'range) := data_out(data_out'high downto (data_out'length/2));
+-- end if;
+-- data_out(data_out'high downto (data_out'length/2)) := (others => '0');
+-- if byte_s = '1' then
+-- if wb_reg.address(0) = '1' then
+-- data_out(byte_t'range) := data_out(hword_t'high downto (hword_t'length/2));
+-- end if;
+-- data_out(hword_t'high downto (hword_t'length/2)) := (others => '0');
+-- end if;
+-- end if;
--- data_out := to_stdlogicvector(to_bitvector(data_out) srl to_integer(unsigned(wb_reg.address(BYTEADDR-1 downto 0)))*byte_t'length);
+ data_out := to_stdlogicvector(to_bitvector(data_out) srl to_integer(unsigned(wb_reg.address(BYTEADDR-1 downto 0)))*byte_t'length);
if (wb_reg_nxt.address(DATA_ADDR_WIDTH+2) /= '1') then
data_addr(DATA_ADDR_WIDTH+1 downto 0) <= wb_reg_nxt.address(DATA_ADDR_WIDTH+1 downto 0);