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[calu.git] / cpu / src / r_w_ram_b.vhd

diff --git a/cpu/src/r_w_ram_b.vhd b/cpu/src/r_w_ram_b.vhd
index e735c203e428d8429ad454e54fff09d9798bb59b..a120a29dd6263a1f5226ad2e1ff4f5236a7de1a0 100644 (file)
--- a/cpu/src/r_w_ram_b.vhd
+++ b/cpu/src/r_w_ram_b.vhd
@@ -10,7 +10,7 @@ architecture behaviour of r_w_ram is
        subtype RAM_ENTRY_TYPE is std_logic_vector(DATA_WIDTH -1 downto 0);
        type RAM_TYPE is array (0 to (2**ADDR_WIDTH)-1) of RAM_ENTRY_TYPE;
        
-       signal ram : RAM_TYPE;
+       signal ram : RAM_TYPE := (others => x"00000000");
        
 begin
        process(clk)