pipe v1

[calu.git] / cpu / src / r2_w_ram_b.vhd

diff --git a/cpu/src/r2_w_ram_b.vhd b/cpu/src/r2_w_ram_b.vhd
index 3c71ade0c41a6d254832c95865d877cf64f11b35..d067ad3a9589ec053ac9a67edb6e52bec2da58fe 100644 (file)
--- a/cpu/src/r2_w_ram_b.vhd
+++ b/cpu/src/r2_w_ram_b.vhd
@@ -11,10 +11,10 @@ architecture behaviour of r2_w_ram is
        type RAM_TYPE is array (0 to (2**ADDR_WIDTH)-1) of RAM_ENTRY_TYPE;
        
        signal ram : RAM_TYPE := (
-                               0 => x"00000010",
-                               1 => x"00110010",
-                               2 => x"000000FF",
-                               3 => x"00AB00BA",
+                               0 => x"00000000",
+                               1 => x"00000001",
+                               2 => x"00000002",
+                               3 => x"00000003",
                                others=> x"00000000");
 
 begin