writeback stage

[calu.git] / cpu / src / core_pkg.vhd

diff --git a/cpu/src/core_pkg.vhd b/cpu/src/core_pkg.vhd
index 3f916fb3d3701906df26a56e0aaafac3ba85497f..24d06a29afef22c7757152cdd91f99c73c69b89a 100644 (file)
--- a/cpu/src/core_pkg.vhd
+++ b/cpu/src/core_pkg.vhd
@@ -102,6 +102,24 @@ package core_pkg is
                --System inputs
                        clk : in std_logic;
                        reset : in std_logic
+
+                       result : in gp_register_t;      --reg  (alu result or jumpaddr)
+                       result_addr : in gp_addr_t;     --reg
+                       address : in word_t;            --ureg 
+                       ram_data : in word_t;           --ureg
+                       alu_jmp : in std_logic;         --reg
+                       br_pred : in std_logic;         --reg
+                       write_en : in std_logic;        --reg  (register file)
+                       dmem_en : in std_logic;         --ureg (jump addr in mem or in address)
+                       dmem_write_en : in std_logic;   --ureg
+                       hword : in std_logic;           --ureg
+                       byte_s : in std_logic;          --ureg  
+
+                       regfile_val : out gp_register_t;
+                       reg_we : out std_logic;
+                       reg_addr : out gp_addr_t;
+                       jump_addr : out instruction_addr_t;
+                       jump : out std_logic
                );
        end component writeback_stage;