disasm/sim: changed interface, branch => br, features++
[calu.git] / 3b_sim / ccpu.cpp
index 3ad97fb8bf7873ed55c6c530bb57dd4a88ab5677..3fee8752cf020539e12e78d511771c8ff6f9fc73 100644 (file)
 
 void CCpu::tick()
 {
+       // signal extensions
+       // Todo
+
        m_pc = m_pc_next;
        m_pc_next += 4;
+       Iinstr* instr = this->getProg(m_pc);
+       if(instr == NULL) {
+               throw string("Out of Instructions!");
+       }
+       if(this->conditionMet(instr->getCondition())) {
+               instr->execInstr();
+       }
+}
+
+bool CCpu::conditionMet(short cond)
+{
+       switch(cond) {
+               case NOT_EQUAL:
+                       return !this->m_Z;
+                       break;
+               case EQUAL:
+                       return this->m_Z;
+                       break;
+               case NOT_OVERFLOW:
+                       return !this->m_O;
+                       break;
+               case OVER_FLOW:
+                       return this->m_O;
+                       break;
+               case NOT_CARRY:
+                       return !this->m_C;
+                       break;
+               case CARRY:
+                       return this->m_C;
+                       break;
+               case NOT_SIGNED:
+                       return !this->m_S;
+                       break;
+               case SIGNED:
+                       return this->m_S;
+                       break;
+               case ABOVE:
+                       return (!this->m_C && !this->m_Z);
+                       break;
+               case BELOW_EQ:
+                       return (this->m_C || this->m_Z);
+                       break;
+               case GREATER_EQ:
+                       return (this->m_S == this->m_O);
+                       break;
+               case LESS:
+                       return (this->m_S != this->m_O);
+                       break;
+               case GREATER:
+                       return (!this->m_Z && (this->m_S == this->m_O));
+                       break;
+               case LESS_EQ:
+                       return (!this->m_Z || (this->m_S != this->m_O));
+                       break;
+               case ALWAYS:
+                       return true;
+                       break;
+               case NEVER:
+                       return false;
+                       break;
+               default:
+                       cerr << "What did you do? more than 16 values in 5 bits?!" << endl;
+                       return false;
+       }
+
+}
+
+CDat CCpu::getCurPC() const
+{
+       return m_pc;
 }
 
-CDat CCpu::getNextPC() const
+void CCpu::setNextPC(CDat val)
 {
-       return m_pc_next;
+       m_pc_next = val;
 }
 
+void CCpu::updateFlags(CDat val) {
+       this->m_Z = (val == 0);
+       this->m_S = ((val >> (BIT_LEN-1)) & 0x1);
+       this->m_C = false;
+       this->m_O = false;
+}
+
+void CCpu::updateFlags(bool z, bool o, bool c, bool s)
+{
+       this->m_Z = z;
+       this->m_O = o;
+       this->m_C = c;
+       this->m_S = s;
+}
+
+CDat CCpu::getRegister(const int addr) const
+{
+       return m_reg.get(addr);
+}
 
-//             CDat getRegister(const short) const {};
-//             void setRegister(const short, CDat&) {};
+void CCpu::setRegister(const int addr, CDat data)
+{
+       m_reg.set(addr, data);
+}
 
-//             CDat getRAM(const short) const {};
-//             void setRAM(const short, CDat&) {};
+CDat CCpu::getRAM(const int addr) const
+{
+       return m_ram.get(addr);
+}
+void CCpu::setRAM(const int addr, CDat data)
+{
+       m_ram.set(addr, data);
+}
 
 void CCpu::setProg(int addr, Iinstr* instr)
 {
        m_prog.set(addr, instr);
 }
 
-CCpu::CCpu() : m_pc(0), m_pc_next(0), m_regfile(0), m_ram(0), m_prog(0)
+Iinstr* CCpu::getProg(const int addr) const
+{
+       return m_prog.get(addr);
+}
+
+int CCpu::getStack() const
+{
+       return this->m_stack;
+}
+
+void CCpu::setStack(const int val)
+{
+       this->m_stack = val;
+}
+
+CCpu::CCpu(int regs, int ram, int prog) : m_Z(false), m_S(false), m_C(false), m_O(false), m_pc(0), m_pc_next(0), m_reg(regs), m_ram(ram), m_prog(prog), m_stack(0)
 {
 }