#define __alpha_int_32 unsigned int
-
/***************************************/
#define AXP_OFF26_MASK 0x03ffffff
#define AXP_OFF21_MASK 0x01fffff
((func & AXP_OFF7_MASK) << AXP_REGSIZE)
#define alpha_op_literal( lit ) \
- ((lit & AXP_OFF7_MASK) << AXP_LIT_SHIFT)
+ ((lit & AXP_OFF8_MASK) << AXP_LIT_SHIFT)
#define alpha_mem_br_func( func, hint ) \
(((func & AXP_OFF2_MASK ) << AXP_MEM_BR_SHIFT ) | (hint&AXP_OFF14_MASK))
#define alpha_encode_palcall( ins, op, func ) \
- *((__alpha_int_32*)(ins))++ = ( 0 |\
- alpha_opcode( op ) | ( func & AXP_OFF26_MASK ))
+ *((__alpha_int_32*)(ins)) = ( 0 |\
+ alpha_opcode( op ) | ( func & AXP_OFF26_MASK )),\
+ ((__alpha_int_32*)(ins))++
#define alpha_encode_mem( ins, op, Rdest, Rsrc, offset ) \
- *((__alpha_int_32*)(ins))++ = ( 0 |\
+ *((__alpha_int_32*)(ins)) = ( 0 |\
alpha_opcode( op ) | alpha_reg_a( Rdest ) | \
- alpha_reg_b( Rsrc ) | (offset & AXP_OFF16_MASK ))
+ alpha_reg_b( Rsrc ) | (offset & AXP_OFF16_MASK )),\
+ ((__alpha_int_32*)(ins))++
#define alpha_encode_mem_fc( ins, op, func, Rdest, Rsrc, offset ) \
- *((__alpha_int_32*)(ins))++ = ( 0 |\
+ *((__alpha_int_32*)(ins)) = ( 0 |\
alpha_opcode( op ) | alpha_reg_a( Rdest ) | \
- alpha_reg_b( Rsrc ) | alpha_mem_fc_func( func ))
+ alpha_reg_b( Rsrc ) | alpha_mem_fc_func( func )),\
+ *((__alpha_int_32*)(ins))++
#define alpha_encode_mem_br( ins, op, func, Rdest, Rsrc, hint ) \
- *((__alpha_int_32*)(ins))++ = ( 0 |\
+ *((__alpha_int_32*)(ins)) = ( 0 |\
alpha_opcode( op ) | alpha_reg_a( Rdest ) | \
- alpha_reg_b( Rsrc ) | alpha_mem_br_func( func, hint ) )
+ alpha_reg_b( Rsrc ) | alpha_mem_br_func( func, hint ) ),\
+ ((__alpha_int_32*)(ins))++
#define alpha_encode_branch( ins, op, Reg, offset ) \
- *((__alpha_int_32*)(ins))++ = ( 0 |\
+ *((__alpha_int_32*)(ins)) = ( 0 |\
alpha_opcode( op ) | alpha_reg_a( Reg ) | \
- (offset & AXP_OFF21_MASK ))
+ (offset & AXP_OFF21_MASK )),\
+ ((__alpha_int_32*)(ins))++
#define alpha_encode_op( ins, op, func, Rsrc1, Rsrc2, Rdest ) \
- *((__alpha_int_32*)(ins))++ = ( 0 |\
+ *((__alpha_int_32*)(ins)) = ( 0 |\
alpha_opcode( op ) | alpha_reg_a( Rsrc1 ) | \
alpha_reg_b( Rsrc2 ) | alpha_op_func( func ) | \
- alpha_reg_c( Rdest ))
+ alpha_reg_c( Rdest )),\
+ ((__alpha_int_32*)(ins))++
#define alpha_encode_opl( ins, op, func, Rsrc, lit, Rdest ) \
- *((__alpha_int_32*)(ins))++ = ( 0 |\
- alpha_opcode( op ) | alpha_reg_a( Rsrc1 ) | \
+ *((__alpha_int_32*)(ins)) = ( 0 |\
+ alpha_opcode( op ) | alpha_reg_a( Rsrc ) | \
alpha_op_literal(lit) | ( 1 << 12 ) | \
- alpha_op_func( func ) | alpha_reg_c( Rdest ) )
+ alpha_op_func( func ) | alpha_reg_c( Rdest ) ),\
+ ((__alpha_int_32*)(ins))++
#define alpha_encode_fpop( ins, op, func, Rsrc1, Rsrc2, Rdest ) \
- *((__alpha_int_32*)(ins))++ = ( 0 |\
+ *((__alpha_int_32*)(ins)) = ( 0 |\
alpha_opcode( op ) | alpha_reg_a( Rsrc1 ) | \
alpha_reg_b( Rsrc2 ) | alpha_fp_func( func ) | \
- alpha_reg_c( Rdest ))
+ alpha_reg_c( Rdest )),\
+ ((__alpha_int_32*)(ins))++
/***************************************/
#define alpha_extqh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x7a, Rsrc1, Rsrc2, Rdest )
#define alpha_extqh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x7a, Rsrc1, lit, Rdest )
+#define alpha_mull(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_op( ins, 0x13, 0x00, Rsrc1, Rsrc2, Rdest )
+#define alpha_mull_(ins, Rsrc1, lit, Rdest) alpha_encode_op( ins, 0x13, 0x00, Rsrc1, lit, Rdest )
+#define alpha_mulq(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_op( ins, 0x13, 0x20, Rsrc1, Rsrc2, Rdest )
+#define alpha_mulq_(ins, Rsrc1, lit, Rdest) alpha_encode_op( ins, 0x13, 0x20, Rsrc1, lit, Rdest )
+
+// For 264
#define alpha_ftois( ins, RFsrc, Rdest ) alpha_encode_fpop( ins, 0x1c, 0x078, RFsrc, alpha_zero, Rdest )
#define alpha_ftoit( ins, RFsrc, Rdest ) alpha_encode_fpop( ins, 0x1c, 0x070, RFsrc, alpha_zero, Rdest )
#define alpha_ftoi_qf( ins, RFsrc, Rdest ) alpha_encode_fpop( ins, 0x1c, 0x070, RFsrc, alpha_zero, Rdest )
-
+// For 264
#define alpha_itofs( ins, Rsrc, RFdest ) alpha_encode_fpop( ins, 0x14, 0x004, Rsrc, alpha_zero, RFdest )
#define alpha_itoff( ins, Rsrc, RFdest ) alpha_encode_fpop( ins, 0x14, 0x014, Rsrc, alpha_zero, RFdest )
#define alpha_itoft( ins, Rsrc, RFdest ) alpha_encode_fpop( ins, 0x14, 0x024, Rsrc, alpha_zero, RFdest )
#define alpha_itof_qf( ins, Rsrc, RFdest ) alpha_encode_fpop( ins, 0x14, 0x024, Rsrc, alpha_zero, RFdest )
-#endif
\ No newline at end of file
+#define alpha_cvtts_c(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x2C, alpha_fzero, Rsrc2, Rdest )
+#define alpha_cvttq_c(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x2F, alpha_fzero, Rsrc2, Rdest )
+#define alpha_cvtqs_c(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x3C, alpha_fzero, Rsrc2, Rdest )
+#define alpha_cvtqt_c(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x3E, alpha_fzero, Rsrc2, Rdest )
+
+
+#define alpha_adds(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x080, Rsrc1, Rsrc2, Rdest )
+#define alpha_subs(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x081, Rsrc1, Rsrc2, Rdest )
+#define alpha_addt(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A0, Rsrc1, Rsrc2, Rdest )
+#define alpha_subt(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A1, Rsrc1, Rsrc2, Rdest )
+#define alpha_mult(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A2, Rsrc1, Rsrc2, Rdest )
+#define alpha_divt(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A3, Rsrc1, Rsrc2, Rdest )
+#define alpha_cmptun(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A4, Rsrc1, Rsrc2, Rdest )
+#define alpha_cmpteq(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A5, Rsrc1, Rsrc2, Rdest )
+#define alpha_cmptlt(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A6, Rsrc1, Rsrc2, Rdest )
+#define alpha_cmptle(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A7, Rsrc1, Rsrc2, Rdest )
+
+#define alpha_cvtts(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0AC, alpha_fzero, Rsrc2, Rdest )
+#define alpha_cvttq(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0AF, alpha_fzero, Rsrc2, Rdest )
+#define alpha_cvtqs(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0BC, alpha_fzero, Rsrc2, Rdest )
+#define alpha_cvtqt(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0BE, alpha_fzero, Rsrc2, Rdest )
+
+
+#define alpha_cpys(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x17, 0x020, Rsrc1, Rsrc2, Rdest )
+#define alpha_cpysn(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x17, 0x021, Rsrc1, Rsrc2, Rdest )
+#define alpha_cpyse(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x17, 0x022, Rsrc1, Rsrc2, Rdest )
+
+
+#endif
+
/* */
/* void func (void (*callme)(), void *retval, */
/* void *this_obj, stackval *arguments); */
-static inline guint8 *
-emit_prolog (guint8 *p, const gint SIZE, int hasthis )
+static inline unsigned int *
+emit_prolog (unsigned int *pi, const gint SIZE, int hasthis )
{
+ unsigned int *p = (unsigned int *)pi;
// 9 instructions.
alpha_ldah( p, alpha_gp, alpha_pv, 0 );
alpha_lda( p, alpha_gp, alpha_gp, 0 ); // ldgp gp, 0(pv)
alpha_a2: will be moved into alpha_a0... if hasthis is true.
*/
/* store parameters on stack.*/
- alpha_stq( p, alpha_ra, alpha_sp, SIZE-24 ); // ra
- alpha_stq( p, alpha_fp, alpha_sp, SIZE-16 ); // fp
- alpha_stq( p, alpha_a1, alpha_sp, SIZE-8 ); // retval
+ alpha_stq( p, alpha_ra, alpha_sp, (SIZE-24) ); // ra
+ alpha_stq( p, alpha_fp, alpha_sp, (SIZE-16) ); // fp
+ alpha_stq( p, alpha_a1, alpha_sp, (SIZE-8) ); // retval
/* set the frame pointer */
alpha_mov1( p, alpha_sp, alpha_fp );
return p;
}
-static inline guint8 *
-emit_call( guint8 *p , const gint SIZE )
+static inline unsigned int *
+emit_call( unsigned int *pi , const gint SIZE )
{
+ unsigned int *p = (unsigned int *)pi;
+
// 3 instructions
/* call func */
alpha_jsr( p, alpha_ra, alpha_pv, 0 ); // jsr ra, 0(pv)
return p;
}
-static inline guint8 *
-emit_store_return_default(guint8 *p, const gint SIZE )
+static inline unsigned int *
+emit_store_return_default(unsigned int *pi, const gint SIZE )
{
// 2 instructions.
+ unsigned int *p = (unsigned int *)pi;
/* TODO: This probably do different stuff based on the value.
you know, like stq/l/w. and s/f.
*/
- alpha_ldq( p, alpha_t0, alpha_fp, SIZE-8 ); // load void * retval
+ alpha_ldq( p, alpha_t0, alpha_fp, (SIZE-8) ); // load void * retval
alpha_stq( p, alpha_v0, alpha_t0, 0 ); // store the result to *retval.
return p;
}
-static inline guint8 *
-emit_epilog (guint8 *p, const gint SIZE )
+static inline unsigned int *
+emit_epilog (unsigned int *pi, const gint SIZE )
{
+ unsigned int *p = (unsigned int *)pi;
+
// 5 instructions.
alpha_mov1( p, alpha_fp, alpha_sp );
/* restore fp, ra, sp */
- alpha_ldq( p, alpha_ra, alpha_sp, SIZE-24 );
- alpha_ldq( p, alpha_fp, alpha_sp, SIZE-16 );
+ alpha_ldq( p, alpha_ra, alpha_sp, (SIZE-24) );
+ alpha_ldq( p, alpha_fp, alpha_sp, (SIZE-16) );
alpha_lda( p, alpha_sp, alpha_sp, ((SIZE & 8) ? (SIZE+8) : SIZE) );
/* return */
MonoPIFunc
mono_arch_create_trampoline (MonoMethodSignature *sig, gboolean string_ctor)
{
- unsigned char *p;
- unsigned char *buffer;
+ unsigned int *p;
+ unsigned int *buffer;
MonoType* param;
int i, pos;
// allocate.
- buffer = p = malloc(BUFFER_SIZE);
+ buffer = p = (unsigned int *)malloc(BUFFER_SIZE);
memset( buffer, 0, BUFFER_SIZE );
pos = 8 * (sig->param_count - alpharegs - 1);
else
{
// load into register
- alpha_ldq( p, regbase + i, alpha_t0, ARG_LOC( i ) );
+ alpha_ldq( p, (regbase + i), alpha_t0, ARG_LOC( i ) );
}
}
else
else
{
// load into register
- alpha_ldl( p, regbase + i, alpha_t0, ARG_LOC(i) );
+ alpha_ldl( p, (regbase + i), alpha_t0, (ARG_LOC(i)) );
}
break;
case MONO_TYPE_I:
else
{
// load into register
- alpha_ldq( p, regbase + i, alpha_t0, ARG_LOC(i) );
+ alpha_ldq( p, (regbase + i), alpha_t0, ARG_LOC(i) );
}
break;
case MONO_TYPE_R4: