The code worked because we never used mul with CPSR update and the code for ARMOP_MUL happens to be 0.
arminstr_t cond : 4;
} ARMInstrMul;
-#define ARM_MUL_ID 0
-#define ARM_MUL_ID2 9
-#define ARM_MUL_MASK ((0xF << 24) | (0xF << 4))
-#define ARM_MUL_TAG ((ARM_MUL_ID << 24) | (ARM_MUL_ID2 << 4))
-
+#define ARM_MUL_ID 9
#define ARM_DEF_MUL_COND(op, rd, rm, rs, rn, s, cond) \
(rm) | \
+ ARM_MUL_ID << 4 | \
((rs) << 8) | \
((rn) << 12) | \
((rd) << 16) | \
- ((s & 1) << 17) | \
- ((op & 7) << 18) | \
- ARM_MUL_TAG | \
+ ((s & 1) << 20) | \
+ ((op & 7) << 21) | \
ARM_DEF_COND(cond)
/* Rd := (Rm * Rs)[31:0]; 32 x 32 -> 32 */