some black magic for initializing the old version of the k8t800

[coreboot.git] / src / southbridge / via / k8t890 / bridge.c

diff --git a/src/southbridge/via/k8t890/bridge.c b/src/southbridge/via/k8t890/bridge.c
index 1b21b321661c125fc8072d8beeffbaf729d25505..ecfdc3567ad051c6b169accd138c319e9d916105 100644 (file)
--- a/src/southbridge/via/k8t890/bridge.c
+++ b/src/southbridge/via/k8t890/bridge.c
@@ -33,9 +33,14 @@ static void bridge_enable(struct device *dev)
        writeback(dev, 0x40, 0x91);
        writeback(dev, 0x41, 0x40);
        writeback(dev, 0x43, 0x44);
+#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
+       writeback(dev, 0x42, 0x80);
+       writeback(dev, 0x44, 0x35);
+#else
        writeback(dev, 0x44, 0x31);     /* K8M890 should have 0x35 datasheet
                                         * says it is reserved
                                         */
+#endif
        writeback(dev, 0x45, 0x3a);
        writeback(dev, 0x46, 0x88);     /* PCI ID lo */
        writeback(dev, 0x47, 0xb1);     /* PCI ID hi */
@@ -44,7 +49,11 @@ static void bridge_enable(struct device *dev)
         * (Forward VGA compatible memory and I/O cycles )
         */
 
+#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
+       writeback(dev, 0x3e, 0x0a);
+#else
        writeback(dev, 0x3e, 0x16);
+#endif
        dump_south(dev);
 
        /* disable I/O and memory decode, or it freezes PCI bus during BAR sizing */