We hardcode highmemory size in every northbridge! This is bad, and especially if...
[coreboot.git] / src / northbridge / intel / i855 / northbridge.c
index e59dfd4ccb481a52c69e43d0af77bd8219dac2a0..53f599715b679fe65a757eb4d64948669149e85a 100644 (file)
@@ -54,8 +54,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
 };
 
 #if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64    // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
 #endif
 static void pci_domain_set_resources(device_t dev)
 {
@@ -112,8 +111,8 @@ static void pci_domain_set_resources(device_t dev)
 
 #if CONFIG_WRITE_HIGH_TABLES==1
                /* Leave some space for ACPI, PIRQ and MP tables */
-               high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
-               high_tables_size = HIGH_TABLES_SIZE * 1024;
+               high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+               high_tables_size = HIGH_MEMORY_SIZE;
 #endif
        }
        assign_resources(dev->link_list);