Improving BKDG implementation of P-states,

[coreboot.git] / src / northbridge / amd / amdht / AsPsDefs.h

diff --git a/src/northbridge/amd/amdht/AsPsDefs.h b/src/northbridge/amd/amdht/AsPsDefs.h
index dd59496c49a14f7923231209d0dea6278399067e..b961ac5aa7db8c10d659d4737d2b02ffac608a9f 100644 (file)
--- a/src/northbridge/amd/amdht/AsPsDefs.h
+++ b/src/northbridge/amd/amdht/AsPsDefs.h
@@ -111,7 +111,7 @@
 #define STC_PS_LMT_MASK 0x8fffffff     /* StcPstateLimit mask off */
 
 #define CPTC0 0x0d4                    /* Clock Power/Timing Control0 Register*/
-#define CPTC0_MASK 0x000c0fff          /* Reset mask for this register */
+#define CPTC0_MASK 0x000cffff          /* Reset mask for this register */
 #define CPTC0_NBFID_MASK 0xffffffe0    /* NbFid mask off for this register */
 #define CPTC0_NBFID_MON 0x1f           /* NbFid mask on for this register */
 #define NB_FID_EN 0x20                 /* NbFidEn bit ON */