AGESA F15: AGESA family15 model 00-0fh northbridge wrapper

[coreboot.git] / src / northbridge / amd / agesa / family15 / Kconfig

diff --git a/src/northbridge/amd/agesa/family15/Kconfig b/src/northbridge/amd/agesa/family15/Kconfig
new file mode 100644 (file)
index 0000000..52f7a1e
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+++ b/src/northbridge/amd/agesa/family15/Kconfig
@@ -0,0 +1,49 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2009 coresystems GmbH
+## Copyright (C) 2012 Advanced Micro Devices, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+config NORTHBRIDGE_AMD_AGESA_FAMILY15
+       bool
+       select HAVE_DEBUG_RAM_SETUP
+       select HAVE_DEBUG_SMBUS
+       select HYPERTRANSPORT_PLUGIN_SUPPORT
+       select MMCONF_SUPPORT
+       select NORTHBRIDGE_AMD_AGESA_FAMILY15_ROOT_COMPLEX
+
+if NORTHBRIDGE_AMD_AGESA_FAMILY15
+config HT3_SUPPORT
+       bool
+       default y
+config HW_MEM_HOLE_SIZEK
+       hex
+       default 0x100000
+config HW_MEM_HOLE_SIZE_AUTO_INC
+       bool
+       default n
+config MMCONF_BASE_ADDRESS
+       hex
+       default 0xF8000000
+config MMCONF_BUS_NUMBER
+       int
+       default 64
+config BOOTBLOCK_NORTHBRIDGE_INIT
+  string
+  default "northbridge/amd/agesa/family15/bootblock.c"
+endif #NORTHBRIDGE_AMD_AGESA_FAMILY15
+
+source "src/northbridge/amd/agesa/family15/root_complex/Kconfig"