- Update the device header files

[coreboot.git] / src / include / device / pci_def.h

diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index 46229a12f4c31a2dd0384b3410bcd80fbce7c844..dc2176babb81b2968fa6c49c7c356b139c267fcb 100644 (file)
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -68,13 +68,13 @@
 #define  PCI_BASE_ADDRESS_SPACE        0x01    /* 0 = memory, 1 = I/O */
 #define  PCI_BASE_ADDRESS_SPACE_IO 0x01
 #define  PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
-#define  PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
-#define  PCI_BASE_ADDRESS_MEM_TYPE_32  0x00    /* 32 bit address */
-#define  PCI_BASE_ADDRESS_MEM_TYPE_1M  0x02    /* Below 1M [obsolete] */
-#define  PCI_BASE_ADDRESS_MEM_TYPE_64  0x04    /* 64 bit address */
+#define  PCI_BASE_ADDRESS_MEM_LIMIT_MASK 0x06
+#define  PCI_BASE_ADDRESS_MEM_LIMIT_32 0x00    /* 32 bit address */
+#define  PCI_BASE_ADDRESS_MEM_LIMIT_1M 0x02    /* Below 1M [obsolete] */
+#define  PCI_BASE_ADDRESS_MEM_LIMIT_64 0x04    /* 64 bit address */
 #define  PCI_BASE_ADDRESS_MEM_PREFETCH 0x08    /* prefetchable? */
-#define  PCI_BASE_ADDRESS_MEM_MASK     (~0x0fUL)
-#define  PCI_BASE_ADDRESS_IO_MASK      (~0x03UL)
+#define  PCI_BASE_ADDRESS_MEM_ATTR_MASK        0x0f
+#define  PCI_BASE_ADDRESS_IO_ATTR_MASK 0x03
 /* bit 1 is reserved if address_space = 1 */
 
 /* Header type 0 (normal devices) */